Patents by Inventor Kuniyuki Hamano

Kuniyuki Hamano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8748326
    Abstract: Provided is a forming device and method making it possible to obtain a low-temperature polysilicon film in which the size of crystal grains fluctuates minimally, and is uniform. A mask has laser-light-blocking areas and laser-light-transmission areas arranged in the form of a grid such that the light-blocking areas and transmission areas are not adjacent to one another. Laser light is directed by the microlenses through the masks to planned channel-area-formation areas. The laser light transmitted by the transmission areas is directed onto an a-Si:H film, annealing and polycrystallizing the irradiated parts thereof. The mask is then removed, and when the entire planned channel-area-formation area is irradiated with laser light, the already-polycrystallized area, having a higher melting point, does not melt, while the area in an amorphous state melts and solidifies, leading to polycrystallization.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: June 10, 2014
    Assignee: V Technology Co., Ltd.
    Inventors: Koichi Kajiyama, Kuniyuki Hamano, Michinobu Mizumura
  • Publication number: 20120220140
    Abstract: Provided is a forming device and method making it possible to obtain a low-temperature polysilicon film in which the size of crystal grains fluctuates minimally, and is uniform. A mask has laser-light-blocking areas and laser-light-transmission areas arranged in the form of a grid such that the light-blocking areas and transmission areas are not adjacent to one another. Laser light is directed by the microlenses through the masks to planned channel-area-formation areas. The laser light transmitted by the transmission areas is directed onto an a-Si:H film, annealing and polycrystallzing the irradiated parts thereof. The mask is then removed, and when the entire planned channel-area-formation area is irradiated with laser light, the already-polycrystallized area, having a higher melting point, does not melt, while the area in an amorphous state melts and solidifies, leading to polycrystallization.
    Type: Application
    Filed: October 14, 2010
    Publication date: August 30, 2012
    Inventors: Koichi Kajiyama, Kuniyuki Hamano, Michinobu Mizumura
  • Patent number: 5103288
    Abstract: The semiconductor device of the present invention includes a semiconductor substrate on which are formed semiconductor elements, and a plurality of wiring layers formed on the semiconductor substrate via porous insulating films. The surface of the plurality of the wiring layers is preferably covered with a compact insulating film. The size of the pores in the porous insulating film is preferably 5 nm to 50 nm in diameter, and the volume of the pores in the porous insulating film is preferably 50% to 80% of the total volume of the porous insulating film. The porous insulating film is formed by subjecting a mixed insulating film of a basic oxide and an acidic oxide to a heat treatment to precipitate only either one of the basic oxide and the acidic oxide, and then dissolving out selectively the basic or acidic oxide precipitated.
    Type: Grant
    Filed: March 27, 1991
    Date of Patent: April 7, 1992
    Assignee: NEC Corporation
    Inventors: Mitsuru Sakamoto, Kuniyuki Hamano
  • Patent number: 4298962
    Abstract: A high-density of semiconductor device is disclosed, which comprises a semiconductor substrate of a first conductivity type, first and second semiconductor regions of a second conductivity provided in the semiconductor substrate, the first and second semiconductor regions defining a channel region therebetween at the surface of the substrate, an insulator film disposed on the channel region, a conductive layer formed on the insulator film, means for producing depletion layers from the first and second semiconductor regions in such a manner that the depletion layers contact with each other to isolate the channel region from the substrate, means for selectively feeding majority carriers of the substrate to the channel region at a density higher than that of the substrate, and a means for detecting the existence of the accumulation of the majority carriers in the channel region.
    Type: Grant
    Filed: January 25, 1980
    Date of Patent: November 3, 1981
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Kuniyuki Hamano, Toshiyuki Ohta