Abstract: A method for testing characteristics of a communication device that includes a plurality of modules using a test fixture includes the steps of connecting the communication device to the test fixture, determining if tests to be performed on the plurality of modules can be simultaneously performed, performing the tests to be performed on the plurality of modules for any tests that are determined can be simultaneously performed, calculating a numerical value for each of the plurality of modules if it is determined that the tests to be performed cannot be simultaneously performed, selecting one of the tests based on the calculated numerical value, and performing the selected one of the tests based on the calculated numerical value and suspending the test or tests on the remaining modules of the plurality of modules other than the selected one of the tests.

Abstract: A method for testing characteristics of a communication device that includes a plurality of modules using a test fixture includes the steps of connecting the communication device to the test fixture, determining if tests to be performed on the plurality of modules can be simultaneously performed, performing the tests to be performed on the plurality of modules for any tests that are determined can be simultaneously performed, calculating a numerical value for each of the plurality of modules if it is determined that the tests to be performed cannot be simultaneously performed, selecting one of the tests based on the calculated numerical value, and performing the selected one of the tests based on the calculated numerical value and suspending the test or tests on the remaining modules of the plurality of modules other than the selected one of the tests.

Abstract: A flip-bonded dual-substrate inductor includes a base substrate, a first inductor body portion provided on a surface of the base substrate, a cover substrate, a second inductor body portion provided on a surface of a cover substrate, and a nanoparticle bonding material provided between the base substrate surface and the cover substrate surface to electrically connect the first inductor body portion and the second inductor body portion. A method for fabricating a flip-bonded dual-substrate inductor including forming a first inductor body portion on a surface of a base substrate, forming a second inductor body portion on a surface of a cover substrate, and attaching the base substrate surface to the cover substrate surface using a nanoparticle bonding material that electrically connects the first inductor body portion and the second inductor body portion.

Abstract: A flip-bonded dual-substrate inductor includes a base substrate, a first inductor body portion provided on a surface of the base substrate, a cover substrate, a second inductor body portion provided on a surface of a cover substrate, and a nanoparticle bonding material provided between the base substrate surface and the cover substrate surface to electrically connect the first inductor body portion and the second inductor body portion. A method for fabricating a flip-bonded dual-substrate inductor including forming a first inductor body portion on a surface of a base substrate, forming a second inductor body portion on a surface of a cover substrate, and attaching the base substrate surface to the cover substrate surface using a nanoparticle bonding material that electrically connects the first inductor body portion and the second inductor body portion.

Abstract: The specification describes an integrated passive device (IPD) that is formed on a silicon substrate covered with an oxide layer. Unwanted accumulated charge at the silicon/oxide interface are rendered immobile by creating trapping centers in the silicon surface. The trapping centers are produced by a polysilicon layer interposed between the silicon substrate and the oxide layer.

Abstract: Described is a WLAN/BT system with improved compatibility. It employs an adaptive algorithm that dynamically optimizes the WLAN data fragmentation size based on the current WLAN data rates such that the fragmented data packets fit the time slots allowed by the BT SCO stream gaps. The algorithm first uses system level information to acquire the concurrent BT traffic types to decide if TDM method needs to be enabled. Then it uses the smoothed WLAN date rate to calculate maximum fragmentation packet size consistent with current overall WLAN traffic.

Abstract: Balun transformers are described wherein multiple transformer loops are implemented in a stacked design with the primary and secondary loops overlying one another. By aligning the loops in a vertical direction, instead of offsetting the loops, the area of the device is reduced. Multiple transformer loops are nested on each level, and the transformer loops on a given level are connected together using a crossover located on a different level.

Abstract: Balun transformers are described wherein multiple transformer loops are implemented in a stacked design with the primary and secondary loops overlying one another. By aligning the loops in a vertical direction, instead of offsetting the loops, the area of the device is reduced. Multiple transformer loops are nested on each level, and the transformer loops on a given level are connected together using a crossover located on a different level.

Abstract: An RF/IPD package with improved thermal management is described. The IPD substrate is attached to a system substrate with a thin RF chip mounted in the standoff between the IPD substrate and the system substrate. RF interconnections are made between the top of the RF chip and the bottom of the IPD substrate. Heat sinking is provided by bonding a heat sink layer on the RF chip to a heat sink layer on the system substrate. The heat sink may also serve as a ground plane connection. Combinations of other types of integrated devices may be fabricated using this approach.

Abstract: The specification describes a multi-chip module (MCM) that contains an integrated passive device (IPD) as the carrier substrate (IPD MCM). Parasitic electrical interactions are controlled at one or both interfaces of the IPD either by eliminating metal from the interfaces, or by selective use of metal in parts of the MCM that are remote from the sensitive device components. The sensitive device components are primarily analog circuit components, especially RF inductor elements. In the IPD layout, the sensitive components are segregated from other components. This allows implementation of the selective metal approach. It also allows parasitic interactions on top of the IPD substrate to be reduced by selective placement of IC semiconductor chips and IC chip ground planes. In preferred embodiments of the IPD MCM of the invention, the IPD substrate is polysilicon, to further minimize RF interactions. The various methods of assembling the module may be adapted to keep the overall thickness within 1.0 mm.

Abstract: The specification describes flip bonded dual substrate inductors wherein a portion of the inductor is constructed on a base IPD substrate, a mating portion of the inductor is constructed on a cover (second) substrate. The cover substrate is then flip bonded to the base substrate, thus mating the two portions of the inductor. Using this approach, a two level inductor can be constructed without using a multilevel substrate. Using two two-level substrates yields a four-level flip bonded dual substrate inductor.

Abstract: The specification describes flip bonded dual substrate inductors wherein a portion of the inductor is constructed on a base IPD substrate, a mating portion of the inductor is constructed on a cover (second) substrate. The cover substrate is then flip bonded to the base substrate, thus mating the two portions of the inductor. Using this approach, a two level inductor can be constructed without using a multilevel substrate. Using two two-level substrates yields a four-level flip bonded dual substrate inductor.

Abstract: The specification describes an integrated passive device (IPD) that is formed on a silicon substrate covered with an oxide layer. Unwanted accumulated charge at the silicon/oxide interface are rendered immobile by creating trapping centers in the silicon surface. The trapping centers are produced by a polysilicon layer interposed between the silicon substrate and the oxide layer.

Abstract: Multi-media Memory Card (MMC) devices, Secure Digital (SD) devices, and Secure Digital Input Output (SDIO) devices connected to a single host controller with signals multiplexed to allow simultaneous activation of more than one device at a time.

Abstract: The specification describes SDIO devices and SDIO cards wherein the SDIO devices are provided with enhanced functionality, and the SDIO cards are provided with enhanced IC capacity. A variety of multi-chip-module (MCM) approaches are used to increase the IC capacity of the SDIO card.

Abstract: The specification describes an integrated passive device (IPD) designed to allow implementation of cellular RF and Wi-Fi RF in a single hand held device. To address the problem of RF interference a thin film RF high rejection bandpass filter is formed in an IPD implementation. The IPD implementation preferably uses silicon as the substrate material. This allows the thin film RF high rejection bandpass filter to be made using silicon processing technology, and thus produce low cost filters that still meet stringent performance requirements demanded due to the co-existing RF units. In preferred embodiments of the invention, wafer level processing using silicon substrates adds to the cost effective manufacture of the highly functional IPDs.

Abstract: The specification describes PDA (SD/MMC) devices and PDA cards wherein the substrate on which the PDA components are mounted comprises two tiers. Components with a high profile are mounted on the lower tier, and devices with normal or low heights are mounted on the upper tier. The upper tier is contained in the portion of the card conforming to, for example, the 1.4 mm SDA standard thickness, while the lower tier is formed in the portion of the card that allows a larger thickness, for example SDA standard thickness 2.1 mm.

Abstract: The specification describes MMC, SD, and SDIO devices connected to a single host controller with signals multiplexed to allow simultaneous activation of more than one device at a time.

Abstract: The specification describes a multi-chip module (MCM) that contains an integrated passive device (IPD) as the carrier substrate (IPD MCM). Parasitic electrical interactions are controlled at one or both interfaces of the IPD either by eliminating metal from the interfaces, or by selective use of metal in parts of the MCM that are remote from the sensitive device components. The sensitive device components are primarily analog circuit components, especially RF inductor elements. In the IPD layout, the sensitive components are segregated from other components. This allows implementation of the selective metal approach. It also allows parasitic interactions on top of the IPD substrate to be reduced by selective placement of IC semiconductor chips and IC chip ground planes. In preferred embodiments of the IPD MCM of the invention, the IPD substrate is polysilicon, to further minimize RF interactions. The various methods of assembling the module may be adapted to keep the overall thickness within 1.0 mm.

Abstract: The specification describes SDIO devices and SDIO cards wherein the SDIO devices are provided with enhanced functionality, and the SDIO cards are provided with enhanced IC capacity. A variety of multi-chip-module (MCM) approaches are used to increase the IC capacity of the SDIO card.