Patents by Inventor Kuo-Chen Lin

Kuo-Chen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020094256
    Abstract: Within both a stocker apparatus and a method for operating the stocker apparatus there is employed: (1) a minimum of six input/output ports; (2) an array of storage locations for storing an array of work in process (WIP) product units; and (3) a random access transportation means for transporting a work in process (WIP) product unit at least bidirectionally between the minimum of six input/output ports and a storage location within the array of storage locations. Within the stocker apparatus and the method, the minimum of six input/output ports provides for more efficient operation of the stocker apparatus.
    Type: Application
    Filed: January 16, 2001
    Publication date: July 18, 2002
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Yen Chang, Kuo-Chen Lin
  • Publication number: 20020095223
    Abstract: Within both a stocker apparatus and a method for operating the stocker apparatus there is employed, in addition to: (1) a minimum of one input/output port; (2) an array of storage locations for storing an array of work in process (WIP) product units; and (3) a random access transportation means for transporting a work in process (WIP) product unit at least bidirectionally between the minimum of one input/output port and a storage location within the array of storage locations; (4) a controller for controlling the random access transportation means. Within the stocker apparatus and the method, the controller is programmed such that upon unavailability of the minimum of one input/output port and upon concurrent receipt of a request to retrieve a work in process (WIP) product unit stored within the array of storage locations to reposition the requested work in process (WIP) product unit to a designated storage location within the array of storage locations where it may be manually retrieved.
    Type: Application
    Filed: January 16, 2001
    Publication date: July 18, 2002
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Yen Chang, Kuo-Chen Lin
  • Patent number: 6353769
    Abstract: A system and a method are provided employing the concept of Budget Queue Time to define the priority of lots while distinguishing clearly between the controllable an uncontrollable portions of the remaining production time needed and to make the priority setting further meet the actual status. Two indices X and P are used concurrently to define the priority of a lot. X is the index of the delivery week which indicates the week in which the lot must be out of the fabrication process and P denotes the temporary priority according to the Budget Queue Time, but X is the dominant one of the two indices X and P. Use is made of the concept of remaining Budget Queue Time instead of traditional queue time of current stage for dispatching to reduce the variance of cycle time variance.
    Type: Grant
    Filed: March 22, 1999
    Date of Patent: March 5, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Kuo-Chen Lin
  • Publication number: 20010015629
    Abstract: A plural motor assembly includes a first motor generating a parameter, a control circuit electrically connected to the first motor for detecting the parameter and outputting a switch signal while the parameter is abnormal, and a second motor electrically connected to the control circuit and operating in response to the switch signal. Thus, when one motor is damaged, another motor is started for maintaining a normal operation.
    Type: Application
    Filed: December 8, 2000
    Publication date: August 23, 2001
    Applicant: DELTA ELECTRONICS INC.
    Inventors: Wen-Shi Huang, Kuo-Chen Lin, Ming-Shi Tsai
  • Patent number: 5880960
    Abstract: The invention provides an index of line balance method for maintaining optimum queued quantities of products at a manufacturing step and over an entire manufacturing line. The method begins by: first, assigning a daily standard move of product (Std Move) which should be produced in a manufacturing line. Second, the standard WIP StdWIP is calculated for each manufacturing stage i by multiplying the theoretical cycle time C/T of each stage by the daily standard move StdMove; (i.e., StdWIP=CT*StdMove). Third, the difference Di between the current WIP CWi and standard WIP StdWIP at every stage i. (Di=Cwi-Swi, ) is calculated. Fourth, the cumulative difference CDi between current WIP Cwi and standard WIP StdWIP of every stage i from stage i to stage n is calculated. ##EQU1## Fifth, the index of line balance BIi is calculated by dividing the sum of all positive CDi from stage i to stage n by the absolute value of the sum of all negative CDi from stage i to stage n.
    Type: Grant
    Filed: January 27, 1997
    Date of Patent: March 9, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Chen Lin, Sheng-Rong Huang, Yi-Chin Hsu
  • Patent number: 5818716
    Abstract: In a semiconductor manufacturing fabrication plant with production to-order type operation, hundreds of devices and various processes are managed. To provide short cycle time and precise delivery to satisfy customer expectations is a major task. A dispatching algorithm named "Required Turn Rate (RTR)" functions according to the level of current wafers in process (WIP) algorithm revising the due date for every lot to satisfy the demand from Master Production Scheduling (MPS). Further the RTR algorithm calculates the RTR of each lot based on process flow to fulfill the delivery requirement. The RTR algorithm determines not only due date and production priority of each lot, but also provides RTR for local dispatching. The local dispatching systems of each working area dispatch the lots by using required turn rate to maximize output and machines utilization.
    Type: Grant
    Filed: October 18, 1996
    Date of Patent: October 6, 1998
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Wen-Cheng Chin, Jiann-Kwang Wang, Kuo-Chen Lin, Sheng-Rong Huang