Abstract: A method of forming a contact structure is provided. A silicon-containing substrate is provided with a composite dielectric layer formed thereon. An opening penetrates through the composite dielectric layer and exposes a portion of the source/drain region. A titanium nitride layer is formed in the opening, and the titanium nitride layer is in contact with the exposed portion of the source/drain region. The titanium nitride layer is annealed, so that the bottom portion of the titanium nitride layer is partially transformed into a titanium silicide layer. A conductive layer is formed to fill up the opening.

Abstract: A method of forming a contact structure is provided. A silicon-containing substrate is provided with a composite dielectric layer formed thereon. An opening penetrates through the composite dielectric layer and exposes a portion of the source/drain region. A titanium nitride layer is formed in the opening, and the titanium nitride layer is in contact with the exposed portion of the source/drain region. The titanium nitride layer is annealed, so that the bottom portion of the titanium nitride layer is partially transformed into a titanium silicide layer. A conductive layer is formed to fill up the opening.

Abstract: The present invention provides a method for metal gate work function tuning before contact formation in a fin-shaped field effect transistor (FinFET), where in the method comprises the following steps. (S1) providing a substrate having a metal gate structure on a side of the substrate, (S2) forming a titanium nitride (TiN) layer on the side of the substrate, and (S3) performing a gate annealing to tune work function of the metal gate structure.

Abstract: A semiconductor process for forming a plug includes the following steps. A dielectric layer having a recess is formed on a substrate. A titanium layer is formed to conformally cover the recess. A first titanium nitride layer is formed to conformally cover the titanium layer, thereby the first titanium nitride layer having first sidewall parts. The first sidewall parts of the first titanium nitride layer are pulled back, thereby second sidewall parts being formed. A second titanium nitride layer is formed to cover the recess. Moreover, a semiconductor structure formed by said semiconductor process is also provided.

Abstract: A metal gate forming process includes the following steps. A first metal layer is formed on a substrate by at least a first step followed by a second step, wherein the processing power of the second step is higher than the processing power of the first step.

Abstract: A semiconductor process of forming metal gates with different threshold voltages includes the following steps. A substrate having a first area and a second area is provided. A dielectric layer and a first work function layer are sequentially formed on the substrate of the first area and the second area. A second work function layer is directly formed on the first work function layer of the first area. A third work function layer is directly formed on the first work function layer of the second area, where the third work function layer is different from the second work function layer. The present invention also provides a semiconductor structure formed by said semiconductor process.

Abstract: A method for fabricating a semiconductor device is provided. The method includes the following steps. Firstly, a substrate having a nitride layer and a platinum (Pt)-containing nickel (Ni)-semiconductor compound layer is provided. Then the nitride layer and the Pt are removed in situ with a chemical solution including a sulfuric acid component and a phosphoric acid component.

Abstract: A manufacturing method of a semiconductor device comprises the following steps. First, a substrate is provided, at least one fin structure is formed on the substrate, and a metal layer is then deposited on the fin structure to form a salicide layer. After depositing the metal layer, the metal layer is removed but no RTP is performed before the metal layer is removed. Then a RTP is performed after the metal layer is removed.

Abstract: A method for fabricating a semiconductor device is provided. The method includes the following steps. Firstly, a substrate having a nitride layer and a platinum (PO-containing nickel (Ni)-semiconductor compound layer is provided. Then the nitride layer and the Pt are removed in situ with a chemical solution including a sulfuric acid component and a phosphoric acid component.

Abstract: The present invention provides a method of removing oxides. First, a substrate having the oxides is loaded into a reaction chamber, which includes a susceptor setting in the bottom portion of the chamber, a shower head setting above the susceptor, and a heater setting above the susceptor. Subsequently, an etching process is performed. A first thermal treatment process is then carried out. Finally, a second thermal treatment process is carried out, and a reaction temperature of the second thermal treatment process is higher than a reaction temperature of the first thermal treatment process.

Abstract: A method for fabricating metal-oxide semiconductor (MOS) transistor is disclosed. The method includes the steps of: providing a semiconductor substrate having a silicide thereon; performing a first rapid thermal process to drive-in platinum from a surface of the silicide into the silicide; and removing un-reacted platinum in the first rapid thermal process.

Abstract: A manufacturing method of a semiconductor device comprises the following steps. First, a substrate is provided, at least one fin structure is formed on the substrate, and a metal layer is then deposited on the fin structure to form a salicide layer. After depositing the metal layer, the metal layer is removed but no RTP is performed before the metal layer is removed. Then a RTP is performed after the metal layer is removed.

Abstract: A semiconductor process includes the following steps. A wafer on a pedestal is provided. The pedestal is lifted to approach a heating source and an etching process is performed on the wafer. An annealing process is performed on the wafer by the heating source. In another way, a wafer on a pedestal, and a heating source on a same side of the wafer as the pedestal are provided. An etching process is performed on the wafer by setting the temperature difference between the heating source and the pedestal larger than 180° C.

Abstract: A salicide process is described. A substrate having thereon an insulating layer and a silicon-based region is provided. A nickel-containing metal layer is formed on the substrate. A first anneal process is performed to form a nickel-rich silicide layer on the silicon-based region. The remaining nickel-containing metal layer is stripped. A thermal recovery process is performed at a temperature of 150-250° C. for a period longer than 5 minutes. A second anneal process is performed to change the phase of the nickel-rich silicide layer and form a low-resistivity mononickel silicide layer.

Abstract: A manufacturing method of a semiconductor device comprises the following steps. First, a substrate is provided, at least one fin structure is formed on the substrate, and a metal layer is then deposited on the fin structure to form a salicide layer. After depositing the metal layer, the metal layer is removed but no RTP is performed before the metal layer is removed. Then a RTP is performed after the metal layer is removed.

Abstract: A cleaning method of a semiconductor manufacturing process is provided. The cleaning method is applied to a semiconductor component including a plurality of material layers formed thereon. An opening is defined in the material layers, and a side wall is exposed from the opening. The side wall at least includes a first material layer and a second material layer. At first, a first cleaning process is performed till a lateral etched thickness of the first material layer is equal to a lateral etched thickness of the second material layer. Then, a byproduct formed in the first cleaning process is removed.

Abstract: A salicide process is described. A substrate having thereon an insulating layer and a silicon-based region is provided. A nickel-containing metal layer is formed on the substrate. A first anneal process is performed to form a nickel-rich silicide layer on the silicon-based region. The remaining nickel-containing metal layer is stripped. A thermal recovery process is performed at a temperature of 150-250° C. for a period longer than 5 minutes. A second anneal process is performed to change the phase of the nickel-rich silicide layer and form a low-resistivity mononickel silicide layer.

Abstract: The present invention provides a method for forming a salicide layer. First, a metal-atom-containing layer is formed on a substrate, a first rapid thermal process (RTP) is then performed to the metal-atom-containing layer to form a transitional salicide layer on a specific region. The metal-atom-containing layer is then removed, a thermal conductive layer is formed on the surface of the transitional salicide layer, and a second RTP is performed on the transitional salicide layer.

Abstract: A manufacturing method of a semiconductor device comprises the following steps. First, a substrate is provided, at least one fin structure is formed on the substrate, and a metal layer is then deposited on the fin structure to form a salicide layer. After depositing the metal layer, the metal layer is removed but no RTP is performed before the metal layer is removed. Then a RTP is performed after the metal layer is removed.

Abstract: A method for fabricating metal-oxide semiconductor (MOS) transistor is disclosed. The method includes the steps of: providing a semiconductor substrate having a silicide thereon; performing a first rapid thermal process to drive-in platinum from a surface of the silicide into the silicide; and removing un-reacted platinum in the first rapid thermal process.