Patents by Inventor Kuo-En HUANG

Kuo-En HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10930731
    Abstract: An integrated circuit device is provided. The integrated circuit device includes a semiconductor substrate having a circuit area and a guarding area surrounding the circuit area. A guarding structure is formed in the guarding area, and includes a diffusion region in the semiconductor substrate. The guarding structure also includes a gate stack disposed on the semiconductor substrate and positioned adjacent to the diffusion region. The guarding structure further includes a guarding layer disposed on the gate stack. The gate stack extends in a first direction while the guarding layer extends in a second direction that is different from the first direction. The guarding layer is electrically insulated from the diffusion region. Thus, an integrated circuit device including a guarding structure with several capacitors is provided.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: February 23, 2021
    Assignee: MEDIATEK Singapore Pte. Ltd.
    Inventors: Zheng Zeng, Kuo-En Huang
  • Publication number: 20200127085
    Abstract: An integrated circuit device is provided. The integrated circuit device includes a semiconductor substrate having a circuit area and a guarding area surrounding the circuit area. A guarding structure is formed in the guarding area, and includes a diffusion region in the semiconductor substrate. The guarding structure also includes a gate stack disposed on the semiconductor substrate and positioned adjacent to the diffusion region. The guarding structure further includes a guarding layer disposed on the gate stack. The gate stack extends in a first direction while the guarding layer extends in a second direction that is different from the first direction. The guarding layer is electrically insulated from the diffusion region. Thus, an integrated circuit device including a guarding structure with several capacitors is provided.
    Type: Application
    Filed: June 13, 2019
    Publication date: April 23, 2020
    Applicant: MEDIA TEK Singapore Pte. Ltd.
    Inventors: Zheng Zeng, Kuo-En Huang
  • Patent number: 9978751
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a semiconductor substrate, a well region on the semiconductor substrate, a radio frequency circuit, a first guard ring adjacent to the RF circuit, and a first isolation region directly disposed between the RF circuit and the first guard ring. The well region has a first conductive type. The RF circuit includes a FIN field-effect transistor having a plurality of first fins and a plurality of first polys on the well region, wherein the first polys are perpendicular to the first fins. The first guard ring includes a plurality of second fins and a pair of second polys on the well region, wherein the second polys are perpendicular to the second fins. The first fins are arranged parallel to the second fins, and the first fins are separated from the second fins by the first isolation region.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: May 22, 2018
    Assignee: MEDIATEK INC.
    Inventors: Yu-Jen Wang, Kuo-En Huang
  • Publication number: 20170338231
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a semiconductor substrate, a well region on the semiconductor substrate, a radio frequency circuit, a first guard ring adjacent to the RF circuit, and a first isolation region directly disposed between the RF circuit and the first guard ring. The well region has a first conductive type. The RF circuit includes a FIN field-effect transistor having a plurality of first fins and a plurality of first polys on the well region, wherein the first polys are perpendicular to the first fins. The first guard ring includes a plurality of second fins and a pair of second polys on the well region, wherein the second polys are perpendicular to the second fins. The first fins are arranged parallel to the second fins, and the first fins are separated from the second fins by the first isolation region.
    Type: Application
    Filed: April 21, 2017
    Publication date: November 23, 2017
    Inventors: Yu-Jen WANG, Kuo-En HUANG