Abstract: A thermally conductive board includes a first metal layer, a second metal layer, and a thermally conductive layer. The material of the first metal layer includes copper, and the first metal layer has a first top surface and a first bottom surface opposite to the first top surface. A first metal coating layer covers the first bottom surface. The material of the second metal layer includes copper, and the second metal layer has a second top surface and a second bottom surface opposite to the second top surface. A second metal coating layer covers the second top surface and faces the first metal coating layer. The thermally conductive layer is an electrically insulator laminated between the first metal coating layer and the second metal coating layer.

Abstract: A method of fabricating layered structure is disclosed. A basal layer is formed. A laminate is formed on the basal layer, and the laminate includes a device layer, a sacrificial layer and a protection layer stacked in sequence. The device layer, the sacrificial layer and the protection layer are etched to obtain a patterned laminate. A first dielectric layer covering a lateral surface of the patterned laminate is formed. Part of the first dielectric layer and part of the protection layer are removed by polishing. The protection layer of the patterned laminate is etched to expose the sacrificial layer. A through hole in the first dielectric layer is formed to expose the basal layer. The sacrificial layer of the patterned laminate is etched to form an opening in the first dielectric layer, and the opening exposes a top surface of the device layer.

Abstract: A method of manufacturing a diode structure includes forming a first stack on a silicon layer on a substrate. A first sidewall spacer extending along and covering a sidewall of the first stack is formed. The silicon layer is selectively etched to a first predetermined depth, thereby forming a second stack. The remaining silicon layer includes a silicon base. A second sidewall spacer extending along and covering a sidewall of the second stack is formed. The silicon base is selectively etched to form a third stack on the substrate. With the second sidewall spacer as a mask, lateral plasma ion implantation is performed. Defects at the interface between two adjacent semiconductor layers can be reduced by the method.

Abstract: A method of manufacturing a diode structure includes forming a first stack on a silicon layer on a substrate. A first sidewall spacer extending along and covering a sidewall of the first stack is formed. The silicon layer is selectively etched to a first predetermined depth, thereby forming a second stack. The remaining silicon layer includes a silicon base. A second sidewall spacer extending along and covering a sidewall of the second stack is formed. The silicon base is selectively etched to form a third stack on the substrate. With the second sidewall spacer as a mask, lateral plasma ion implantation is performed. Defects at the interface between two adjacent semiconductor layers can be reduced by the method.

Abstract: A method of manufacturing a phase change memory includes: forming a stacked structure including a conductive layer, a lower electrode layer over the conductive layer, an upper electrode layer, a phase change material between the lower and upper electrode layers, and a selector material between the conductive layer and the lower electrode layer; etching the upper electrode layer to form an upper electrode wire; etching the phase change material according to the upper electrode wire to form a phase change material layer and expose a portion of the lower electrode layer, wherein the phase change material layer has an exposed side surface; after etching the phase change material, performing a nitridizing treatment on the side surface of the phase change material layer to form a nitridized phase change material layer covering the same; and etching the lower electrode layer, the selector material and the conductive layer.

Abstract: A method of manufacturing a phase change memory includes: forming a stacked structure including a conductive layer; a lower electrode layer over the conductive layer; an upper electrode layer over the lower electrode layer; and a phase change material between the lower and upper electrode layers; etching the upper electrode layer according to a first mask to form an upper electrode wire; simultaneously etching the phase change material according to the upper electrode wire and performing a nitridizing treatment in a same plasma etching chamber until a phase change material layer and a nitridized phase change material layer are formed beneath the upper electrode wire and a portion of the lower electrode layer is exposed, wherein the nitridized phase change material layer covers a side surface of the phase change material layer; and removing the portion of the lower electrode layer and the conductive layer therebeneath.

Abstract: A diode structure includes a substrate, a pillar stack disposed on the substrate, and a first barrier layer. The pillar stack includes a first semiconductor layer, a silicon layer, and a second semiconductor layer, in which the first and second semiconductor layers respectively have different dopants such that a conductivity of the first semiconductor layer is different from a conductivity of the second semiconductor layer. The first barrier layer is disposed between the first semiconductor layer and the silicon layer, in which the first barrier layer is configured to prevent the dopants in the first semiconductor layer from diffusing into the silicon layer.

Abstract: A method of manufacturing a diode structure includes forming a first stack on a silicon layer on a substrate. A first sidewall spacer extending along and covering a sidewall of the first stack is formed. The silicon layer is selectively etched to a first predetermined depth, thereby forming a second stack. The remaining silicon layer includes a silicon base. A second sidewall spacer extending along and covering a sidewall of the second stack is formed. The silicon base is selectively etched to form a third stack on the substrate. With the second sidewall spacer as a mask, lateral plasma ion implantation is performed. Defects at the interface between two adjacent semiconductor layers can be reduced by the method.

Abstract: A method of manufacturing a phase change memory includes: forming a stacked structure including a conductive layer; a lower electrode layer over the conductive layer; an upper electrode layer over the lower electrode layer; and a phase change material between the lower and upper electrode layers; etching the upper electrode layer according to a first mask to form an upper electrode wire; simultaneously etching the phase change material according to the upper electrode wire and performing a nitridizing treatment in a same plasma etching chamber until a phase change material layer and a nitridized phase change material layer are formed beneath the upper electrode wire and a portion of the lower electrode layer is exposed, wherein the nitridized phase change material layer covers a side surface of the phase change material layer; and removing the portion of the lower electrode layer and the conductive layer therebeneath.

Abstract: A method of manufacturing a phase change memory includes: forming a stacked structure including a conductive layer, a lower electrode layer over the conductive layer, an upper electrode layer, a phase change material between the lower and upper electrode layers, and a selector material between the conductive layer and the lower electrode layer; etching the upper electrode layer to form an upper electrode wire; etching the phase change material according to the upper electrode wire to form a phase change material layer and expose a portion of the lower electrode layer, wherein the phase change material layer has an exposed side surface; after etching the phase change material, performing a nitridizing treatment on the side surface of the phase change material layer to form a nitridized phase change material layer covering the same; and etching the lower electrode layer, the selector material and the conductive layer.

Abstract: A method of fabricating layered structure is disclosed. A basal layer is formed. A laminate is formed on the basal layer, and the laminate includes a device layer, a sacrificial layer and a protection layer stacked in sequence. The device layer, the sacrificial layer and the protection layer are etched to obtain a patterned laminate. A first dielectric layer covering a lateral surface of the patterned laminate is formed. Part of the first dielectric layer and part of the protection layer are removed by polishing. The protection layer of the patterned laminate is etched to expose the sacrificial layer. A through hole in the first dielectric layer is formed to expose the basal layer. The sacrificial layer of the patterned laminate is etched to form an opening in the first dielectric layer, and the opening exposes a top surface of the device layer.

Abstract: A method of fabricating layered structure is disclosed. A basal layer is formed. A laminate is formed on the basal layer, and the laminate includes a device layer, a sacrificial layer and a protection layer stacked in sequence. The device layer, the sacrificial layer and the protection layer are etched to obtain a patterned laminate. A first dielectric layer covering a lateral surface of the patterned laminate is formed. Part of the first dielectric layer and part of the protection layer are removed by polishing. The protection layer of the patterned laminate is etched to expose the sacrificial layer. A through hole in the first dielectric layer is formed to expose the basal layer. The sacrificial layer of the patterned laminate is etched to form an opening in the first dielectric layer, and the opening exposes a top surface of the device layer.

Abstract: A method of fabricating layered structure is disclosed. A basal layer is formed. A laminate is formed on the basal layer, and the laminate includes a device layer, a sacrificial layer and a protection layer stacked in sequence. The device layer, the sacrificial layer and the protection layer are etched to obtain a patterned laminate. A first dielectric layer covering a lateral surface of the patterned laminate is formed. Part of the first dielectric layer and part of the protection layer are removed by polishing. The protection layer of the patterned laminate is etched to expose the sacrificial layer. A through hole in the first dielectric layer is formed to expose the basal layer. The sacrificial layer of the patterned laminate is etched to form an opening in the first dielectric layer, and the opening exposes a top surface of the device layer.

Abstract: A method of eliminating overhang in a contact hole formed in a contact film stack is described. A liner layer is overlaid on the contact film stack, the liner also coating the contact hole. A portion of the liner is removed to expose the overhang, and the exposed overhang is removed. The liner is also used to fill-in a bowing profile of the contact hole, thereby rendering sidewalls of the contact hole smooth and straight suitable for metal fill-in while suppressing piping defects.

Abstract: A method of eliminating overhang in a contact hole formed in a contact film stack is described. A liner layer is overlaid on the contact film stack, the liner also coating the contact hole. A portion of the liner is removed to expose the overhang, and the exposed overhang is removed. The liner is also used to fill-in a bowing profile of the contact hole, thereby rendering sidewalls of the contact hole smooth and straight suitable for metal fill-in while suppressing piping defects.

Abstract: A method for forming self-cleaning coating comprising hydrophobically-modified particles. Micro- or nano-particles are treated with a hydrophobic agent and an additive to form larger particles with the hydrophobic agent and the additive bonded thereto. A binder or crosslinker is attached to the larger particles by forming chemical bonds with at least one of the additive, the hydrophobic agent, and the particles, thus forming a coating material capable of forming self-cleaning coating.

Abstract: A method for forming a coating material capable of forming a hydrophobic, microstructured surface. The method comprises treating micro or nano-particles particles with a hydrophobic agent and an additive to form larger particles with the hydrophobic agent bonded thereto. The invention also comprises the coating material thus formed.

Abstract: A method for forming self-cleaning coating comprising hydrophobically-modified particles. Micro- or nano-particles are treated with a hydrophobic agent and an additive to form larger particles with the hydrophobic agent and the additive bonded thereto. A binder or crosslinker is attached to the larger particles by forming chemical bonds with at least one of the additive, the hydrophobic agent, and the particles, thus forming a coating material capable of forming self-cleaning coating.

Abstract: A method for forming a coating material capable of forming a hydrophobic, microstructured surface. The method comprises treating micro or nano-particles particles with a hydrophobic agent and an additive to form larger particles with the hydrophobic agent bonded thereto. The invention also comprises the coating material thus formed.