Patents by Inventor Kuo-Hsien Lee
Kuo-Hsien Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240105750Abstract: A CMOS image sensor includes PDAF pixels distributed in an array of image pixels in plan view. Each PDAF pixel includes m×m binned photodiodes, a PDAF color filter overlying the binned photodiodes and laterally surrounded by a first isolation structure, and a PDAF micro-lens overlying the PDAF color filter. A first horizontal distance between a center of the PDAF color filter and a center of the binned photodiodes varies depending on a location of the PDAF pixel in plan view in the CMOS image sensor. Additionally, the first isolation structure includes a first low-n dielectric grid, a second low-n dielectric grid underlying the first low-n dielectric grid, and a metal grid enclosed by the second low-n dielectric grid. The second low-n dielectric grid includes a filler dielectric material different from a second low-n dielectric grid material. Thus, quantum efficiency and uniformity of the CMOS image sensor are improved.Type: ApplicationFiled: February 16, 2023Publication date: March 28, 2024Inventors: Ming-Hsien YANG, Chun-Hao Chou, Kuo-Cheng Lee
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Publication number: 20240074329Abstract: The present invention provides a semiconductor device and a method of forming the same, and the semiconductor device includes a substrate, a first interconnect layer and a second interconnect layer. The first interconnect layer is disposed on the substrate, and the first interconnect layer includes a first dielectric layer around a plurality of first magnetic tunneling junction (MTJ) structures. The second interconnect layer is disposed on the first interconnect layer, and the second interconnect layer includes a second dielectric layer around a plurality of second MTJ structures, wherein, the second MTJ structures and the first MTJ structures are alternately arranged along a direction. The semiconductor device may obtain a reduced size of each bit cell under a permissible process window, so as to improve the integration of components.Type: ApplicationFiled: November 8, 2023Publication date: February 29, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Kuo-Hsing Lee, Chun-Hsien Lin, Sheng-Yuan Hsueh
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Patent number: 11429148Abstract: A portable electronic device includes a mainframe computer, a sliding cover and an electrically-controlled driving device. The mainframe computer includes a base, a receiving recess formed on the base, and a plurality of vent holes which are evenly distributed on the base. The sliding cover slidably covers the receiving recess and the vent holes. The electrically-controlled driving device includes an electric motor and a linkage set. The linkage set is connected to the electric motor and the sliding cover for moving the sliding cover with the electric motor, so that the sliding cover is allowed to cover the vent holes and expose the vent holes from the base.Type: GrantFiled: February 7, 2020Date of Patent: August 30, 2022Assignee: QUANTA COMPUTER INC.Inventors: Kuo-Hsien Lee, Shen-Pu Hsieh
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Publication number: 20210089082Abstract: A portable electronic device includes a mainframe computer, a sliding cover and an electrically-controlled driving device. The mainframe computer includes a base, a receiving recess formed on the base, and a plurality of vent holes which are evenly distributed on the base. The sliding cover slidably covers the receiving recess and the vent holes. The electrically-controlled driving device includes an electric motor and a linkage set. The linkage set is connected to the electric motor and the sliding cover for moving the sliding cover with the electric motor, so that the sliding cover is allowed to cover the vent holes and expose the vent holes from the base.Type: ApplicationFiled: February 7, 2020Publication date: March 25, 2021Applicant: Quanta Computer Inc.Inventors: Kuo-Hsien LEE, Shen-Pu HSIEH
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Patent number: 10263444Abstract: A two way charging-discharging circuit structure has a main system and a secondary system. When the main system is connected to the secondary system, the sequence for discharging the battery modules may be controlled, and the to-be-discharging battery module will not be charged. The battery modules of the main system and the secondary system may be charged simultaneously if the power of the power adapter is large enough.Type: GrantFiled: April 12, 2017Date of Patent: April 16, 2019Assignee: QUANTA COMPUTER INCORPORATEDInventors: Hsin-Chih Kuo, Kuo-Hsien Lee
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Publication number: 20180205237Abstract: A two way charging-discharging circuit structure has a main system and a secondary system. When the main system is connected to the secondary system, the sequence for discharging the battery modules may be controlled, and the to-be-discharging battery module will not be charged. The battery modules of the main system and the secondary system may be charged simultaneously if the power of the power adapter is large enough.Type: ApplicationFiled: April 12, 2017Publication date: July 19, 2018Inventors: Hsin-Chih Kuo, Kuo-Hsien Lee
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Patent number: 8411003Abstract: A liquid crystal display (LCD) and methods of driving same. In one embodiment, the LCD) includes a plurality of gate lines, {Gn}, spatially arranged along a row direction; a plurality of data lines, {Dm}, spatially arranged along a column direction perpendicular to the row direction, and a plurality of pixels, {Pn,m}, spatially arranged in the form of a matrix, where m=1, 2, . . . , M, n=1, 2, . . . , N, and M and N are positive integers.Type: GrantFiled: February 11, 2010Date of Patent: April 2, 2013Assignee: AU Optronics CorporationInventors: Yu-Cheng Tsai, Kuo-Hsien Lee, Chao-Liang Lu, Jing-Tin Kuo
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Patent number: 8207952Abstract: A pixel array, a method for driving the same, and a display panel are provided. The pixel array includes a number of pixel sets, each of which includes a first scan line, a second scan line, a data line, a first active device electrically connected to the first scan line and the data line, a second active device electrically connected to the second scan line and the first active device, a first pixel electrode, a second pixel electrode, a first common electrode line, and a second common electrode line. The first pixel electrode and the second pixel electrode are electrically connected to the first active device and the second active device, respectively. The first common electrode line is disposed under the first pixel electrode and electrically connected to a direct current. The second common electrode line is disposed under the second pixel electrode and electrically connected to an alternating current.Type: GrantFiled: December 5, 2008Date of Patent: June 26, 2012Assignee: Au Optronics CorporationInventors: Jing-Tin Kuo, Chao-Liang Lu, Kuo-Hsien Lee
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Publication number: 20110193842Abstract: A liquid crystal display (LCD) and methods of driving same. In one embodiment, the LCD) includes a plurality of gate lines, {Gn}, spatially arranged along a row direction; a plurality of data lines, {Dm}, spatially arranged along a column direction perpendicular to the row direction, and a plurality of pixels, {Pn,m}, spatially arranged in the form of a matrix, where m=1, 2, . . . , M, n=1, 2, . . . , N, and M and N are positive integers.Type: ApplicationFiled: February 11, 2010Publication date: August 11, 2011Applicant: AU OPTRONICS CORPORATIONInventors: Yu-Cheng Tsai, Kuo-Hsien Lee, Chao-Liang Lu, Jing-Tin Kuo
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Patent number: 7982219Abstract: A pixel array includes scan lines, data lines, and pixels. Each pixel arranged in the nth row includes a first sub-pixel, a second sub-pixel, and a third sub-pixel. In the first sub-pixel, a first gate and a first drain of a first transistor are connected to the (n?1)th scan line and a first pixel electrode, respectively. In the second sub-pixel, a second gate of a second transistor is connected to the nth scan line, and a second drain is connected to a second pixel electrode and a first source of the first transistor. In the third sub-pixel, a third gate of a third transistor is connected to the (n+1)th scan line, a third drain is connected to a third pixel electrode and a second source of the second transistor, and a third source is connected to one of the data lines.Type: GrantFiled: October 8, 2009Date of Patent: July 19, 2011Assignee: Au Optronics CorporationInventors: Jing-Tin Kuo, Kuo-Hsien Lee
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Publication number: 20110080376Abstract: A touch display panel including a first substrate, a touch sensing device, and a display medium layer is provided. The first substrate has a display area and a non-display area located outside the display area. The touch sensing device may be directly disposed on the first substrate and located within the non-display area, wherein the touch sensing device is consisted of two or more groups of receiving elements. The display medium layer is disposed in the display area.Type: ApplicationFiled: November 16, 2009Publication date: April 7, 2011Applicant: Au Optronics CorporationInventors: Jing-Tin Kuo, Mei-Sheng Ma, Kuo-Hsien Lee
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Publication number: 20110017994Abstract: A pixel array includes scan lines, data lines, and pixels. Each pixel arranged in the nth row includes a first sub-pixel, a second sub-pixel, and a third sub-pixel. In the first sub-pixel, a first gate and a first drain of a first transistor are connected to the (n?1)th scan line and a first pixel electrode, respectively. In the second sub-pixel, a second gate of a second transistor is connected to the nth scan line, and a second drain is connected to a second pixel electrode and a first source of the first transistor. In the third sub-pixel, a third gate of a third transistor is connected to the (n+1)th scan line, a third drain is connected to a third pixel electrode and a second source of the second transistor, and a third source is connected to one of the data lines.Type: ApplicationFiled: October 8, 2009Publication date: January 27, 2011Applicant: AU OPTRONICS CORPORATIONInventors: Jing-Tin Kuo, Kuo-Hsien Lee
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Patent number: 7848477Abstract: A shift register including shift register units substantially cascaded is disclosed. Each shift register unit is controlled by first and second clock signals opposite to each other for generating an output signal. Each shift register unit includes first and second switch devices and first and second devices. The first switch device provides the output signal through an output node. The first driving device drives the first switch device according to a first input signal to activate the output signal. The second driving device provides a first voltage signal, according to the first clock signal, to drive the first switch device and de-activate the output signal. When the first switch device de-activates the output signal, the second switch device provides the second voltage signal to the output node according to the second clock signal. A level of the first voltage signal is lower than a level of the second voltage signal.Type: GrantFiled: March 19, 2009Date of Patent: December 7, 2010Assignee: Au Optronics Corp.Inventors: Kuo-Hsing Cheng, Wai-Pan Wu, Kuo-Hsien Lee, Chun-Huai Li
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Publication number: 20100172461Abstract: A shift register including shift register units substantially cascaded is disclosed. Each shift register unit is controlled by first and second clock signals opposite to each other for generating an output signal. Each shift register unit includes first and second switch devices and first and second devices. The first switch device provides the output signal through an output node. The first driving device drives the first switch device according to a first input signal to activate the output signal. The second driving device provides a first voltage signal, according to the first clock signal, to drive the first switch device and de-activate the output signal. When the first switch device de-activates the output signal, the second switch device provides the second voltage signal to the output node according to the second clock signal. A level of the first voltage signal is lower than a level of the second voltage signal.Type: ApplicationFiled: March 19, 2009Publication date: July 8, 2010Applicant: AU OPTRONICS CORP.Inventors: Kuo-Hsing Cheng, Wai-Pan Wu, Kuo-Hsien Lee, Chun-Huai Li
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Publication number: 20100079427Abstract: A pixel array, a method for driving the same, and a display panel are provided. The pixel array includes a number of pixel sets, each of which includes a first scan line, a second scan line, a data line, a first active device electrically connected to the first scan line and the data line, a second active device electrically connected to the second scan line and the first active device, a first pixel electrode, a second pixel electrode, a first common electrode line, and a second common electrode line. The first pixel electrode and the second pixel electrode are electrically connected to the first active device and the second active device, respectively. The first common electrode line is disposed under the first pixel electrode and electrically connected to a direct current. The second common electrode line is disposed under the second pixel electrode and electrically connected to an alternating current.Type: ApplicationFiled: December 5, 2008Publication date: April 1, 2010Applicant: AU OPTRONICS CORPORATIONInventors: Jing-Tin Kuo, Chao-Liang Lu, Kuo-Hsien Lee