Abstract: The present disclosure provides a radiation detector, including a substrate, a pixel array formed on the substrate, a perovskite thick film formed on the pixel array and having a cubic crystal phase, a first electrode formed on the perovskite thick film and is opposite to the pixel array, and a readout circuit. The radiation detector has significantly reduced dark current density and high sensing sensitivity. The present disclosure also provides a method for preparing the perovskite thick film.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first semiconductor device. The semiconductor structure includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first oxide layer formed below the a first substrate, a first bonding layer formed below the first oxide layer, and a first bonding via formed through the first bonding layer and the first oxide layer. The second semiconductor device includes a second oxide layer formed over a second substrate, a second bonding layer formed over the second oxide layer, and a second bonding via formed through the second bonding layer and the second oxide layer. The semiconductor structure also includes a bonding structure between the first substrate and the second substrate, and the bonding structure includes the first bonding via bonded to the second bonding via.

Abstract: A semiconductor device includes a fin structure disposed over a substrate. The semiconductor device includes a gate dielectric layer disposed over the fin structure. The semiconductor device includes an interfacial layer over a top portion of the gate dielectric layer. A bottom portion of gate dielectric layer is free of contact with the interfacial layer. The semiconductor device includes a gate structure straddling the fin structure.

Abstract: An electrode controls transmittance of a blocking layer over a photodiode of a pixel sensor (e.g., a photodiode of a small pixel detector) by changing oxidation of a metal material included in the blocking layer. By using the electrode to adjust transmittance of the blocking layer, pixel sensors for different uses and/or products may be produced using a single manufacturing process. As a result, power and processing resources are conserved that otherwise would have been expended in switching manufacturing processes. Additionally, production time is decreased (e.g., by eliminating downtime that would otherwise have been used to reconfigure fabrication machines.

Abstract: An electrode controls transmittance of a blocking layer over a photodiode of a pixel sensor (e.g., a photodiode of a small pixel detector) by changing oxidation of a metal material included in the blocking layer. By using the electrode to adjust transmittance of the blocking layer, pixel sensors for different uses and/or products may be produced using a single manufacturing process. As a result, power and processing resources are conserved that otherwise would have been expended in switching manufacturing processes. Additionally, production time is decreased (e.g., by eliminating downtime that would otherwise have been used to reconfigure fabrication machines.

Abstract: A method includes forming a gate stack, which includes a first portion over a portion of a first semiconductor fin, a second portion over a portion of a second semiconductor fin, and a third portion connecting the first portion to the second portion. An anisotropic etching is performed on the third portion of the gate stack to form an opening between the first portion and the second portion. A footing portion of the third portion remains after the anisotropic etching. The method further includes performing an isotropic etching to remove a metal gate portion of the footing portion, and filling the opening with a dielectric material.

Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a shallow trench isolation, and a color filter layer. The radiation sensing member is in the semiconductor substrate. An interface between the radiation sensing member and the semiconductor substrate includes a direct band gap material. The shallow trench isolation is in the semiconductor substrate and surrounds the radiation sensing member. The color filter layer covers the radiation sensing member.

Abstract: According to the present disclosure, a measuring method of liquid mixture purity includes steps as follows. A storage tank is provided, wherein the storage tank is configured for storing a liquid mixture including formic acid and water. A calculating unit is provided, wherein a plurality of formic acid purity values are saved in the calculating unit. A pressure-decreasing and heating step is performed by reducing a pressure of the storage tank and heating the storage tank. A measuring step is performed by measuring in the inner space of the storage tank to obtain a pressure value, and measuring the liquid mixture simultaneously to obtain a temperature value. A calculating step is performed by inputting the pressure value and the temperature value into the calculating unit, wherein the calculating unit outputs one of the formic acid purity values corresponding thereto.

Abstract: Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a first gate structure and a second gate structure formed on a substrate, wherein the first gate structure includes a first work function metal having a first material, and the second gate structure includes a second work function metal having a second material, the first material being different from the second material, wherein the first gate structure further includes a gate dielectric layer, a self-protective layer having metal phosphate, and the first work function metal on the self-protective layer.

Abstract: A semiconductor device includes a fin structure disposed over a substrate. The semiconductor device includes a first interfacial layer straddling the fin structure. The semiconductor device includes a gate dielectric layer extending along sidewalls of the fin structure. The semiconductor device includes a second interfacial layer overlaying a top surface of the fin structure. The semiconductor device includes a gate structure straddling the fin structure. The first interfacial layer and the gate dielectric layer are disposed between the sidewalls of the fin structure and the gate structure.

Abstract: A circuit board includes a substrate and a metallic layer. A first area and at least one second area are defined on a portion of the substrate, the second area is located outside the first area. The metallic layer includes first test lines disposed on the first area and second test lines disposed on the second area. A first test pad of each of the first test lines has a first width, and a second test pad of each of the second test lines has a second width. The second width is greater than the first width such that probes of an electrical testing tool can contact the first and second test pads on the circuit board correctly during electrical testing.

Abstract: A manufacturing method of a resistive memory device includes the following steps. A first electrode is formed. A first metal oxide layer is formed on the first electrode, and the first metal oxide layer includes first metal atoms. A multilayer insulator structure is formed on the first metal oxide layer. A second metal oxide layer is formed on the multilayer insulator structure. The second metal oxide layer includes second metal atoms, the multilayer insulator structure includes third metal atoms, and each of the third metal atoms is identical to each of the second metal atoms. A second electrode is formed on the second metal oxide layer. The multilayer insulator structure is disposed between the first metal oxide layer and the second metal oxide layer in a vertical direction, and an atomic percent of the third metal atoms in the multilayer insulator structure changes in the vertical direction.

Abstract: A cleaning process of wafer polishing pad, the process includes providing a wafer polishing pad, performing a planarization process with the wafer polishing pad, leaving a residue on the wafer polishing pad after the planarization process, and performing a cleaning step with a cleaning nozzle to remove the residue, the cleaning nozzle comprises at least one Y-shaped pipe, one end of which is a water outlet, and the other two ends are respectively a water inlet and an air inlet, wherein a cleaning liquid flows from the water inlet to the water outlet, and a pressurized gas flows in from the air inlet.

Abstract: A resistive memory device includes a first electrode, a second electrode, a first metal oxide layer, a second metal oxide layer, and a multilayer insulator structure. The first metal oxide layer is disposed between the first electrode and the second electrode in a vertical direction. The second metal oxide layer is disposed between the first metal oxide layer and the second electrode in the vertical direction. The multilayer insulator structure is disposed between the first metal oxide layer and the second metal oxide layer in the vertical direction. The first metal oxide layer includes first metal atoms, the second metal oxide layer includes second metal atoms, and the multilayer insulator structure includes third metal atoms. Each of the third metal atoms is identical to each of the second metal atoms, and an atomic percent of the third metal atoms in the multilayer insulator structure gradually changes in the vertical direction.

Abstract: A resistive memory device includes a first electrode, a second electrode, a first metal oxide layer, a second metal oxide layer, and a multilayer insulator structure. The first metal oxide layer is disposed between the first electrode and the second electrode in a vertical direction. The second metal oxide layer is disposed between the first metal oxide layer and the second electrode in the vertical direction. The multilayer insulator structure is disposed between the first metal oxide layer and the second metal oxide layer in the vertical direction. The first metal oxide layer includes first metal atoms, the second metal oxide layer includes second metal atoms, and the multilayer insulator structure includes third metal atoms. Each of the third metal atoms is identical to each of the second metal atoms, and an atomic percent of the third metal atoms in the multilayer insulator structure gradually changes in the vertical direction.

Abstract: A resistive memory device includes a first electrode, a second electrode, a first metal oxide layer, a second metal oxide layer, and a multilayer insulator structure. The first metal oxide layer is disposed between the first electrode and the second electrode in a vertical direction. The second metal oxide layer is disposed between the first metal oxide layer and the second electrode in the vertical direction. The multilayer insulator structure is disposed between the first metal oxide layer and the second metal oxide layer in the vertical direction. The first metal oxide layer includes first metal atoms, the second metal oxide layer includes second metal atoms, and the multilayer insulator structure includes third metal atoms. Each of the third metal atoms is identical to each of the second metal atoms, and an atomic percent of the third metal atoms in the multilayer insulator structure gradually changes in the vertical direction.

Abstract: An adaptive lubrication control method used in an adaptive lubrication control system for a machining center having an axial system comprises a controller and a lubricating system. The method uses a built-in macro program unit and programmable logic unit of the controller to acquire the feed rate and load data of the axial system of the machining center for computing the shift parameter of the axial system so that the optimal lubrication timing and lubrication time length can be figured out for controlling the lubricating system to lubricate the axial system automatically.

Abstract: A power supply employs an error detecting circuit to output an error signal when detecting an overvoltage or overcurrent occurred in one of output powers and employs a latch trigger circuit to cause the power supply to enter a latch mode when receiving the error signal. The power supply will keep the latch mode when entering the latch mode until the AC power VAC is removed. In addition, the power supply employs the error detecting circuit to provide the accurate safety threshold value by the constant current source with temperature compensation function and stable constant current output.

Abstract: A power supply employs an error detecting circuit to output an error signal when detecting an overvoltage or overcurrent occurred in one of output powers and employs a latch trigger circuit to cause the power supply to enter a latch mode when receiving the error signal. The power supply will keep the latch mode when entering the latch mode until the AC power VAC is removed. In addition, the power supply employs the error detecting circuit to provide the accurate safety threshold value by the constant current source with temperature compensation function and stable constant current output.

Abstract: The integrity of control signals used to control a wafer handling robot is monitored by a monitor connected to various points of the robotic control system. The monitor includes a memory for storing data sets representing correct, reference characteristics of the control signals. The monitor samples control signals at various points in the control system and compares these sampled signals with the stored reference characteristics in order to determine whether a signal disparity exists. If a disparity exists, the monitor generates an error.