Abstract: Embodiments using immersion de-taping are described. A substrate having a substrate tape attached thereto is provided. The substrate includes electrically conductive connectors attached to the substrate tape. A fluid is provided between the substrate and the substrate tape. While the fluid is between the substrate and the substrate tape, the substrate tape is removed from the substrate. Another embodiment is an apparatus comprising an immersion tank, a substrate chuck, first and second fixed rollers, and a moveable roller. The substrate chuck is configured to secure a substrate and to place the substrate into the immersion tank. The first fixed roller is operable to dispense a clamp tape. The second fixed roller is operable to roll the clamp tape. The moveable roller is operable to extend into the immersion tank and to adhere the clamp tape to a substrate tape on the substrate.

Abstract: Embodiments using immersion de-taping are described. A substrate having a substrate tape attached thereto is provided. The substrate includes electrically conductive connectors attached to the substrate tape. A fluid is provided between the substrate and the substrate tape. While the fluid is between the substrate and the substrate tape, the substrate tape is removed from the substrate. Another embodiment is an apparatus comprising an immersion tank, a substrate chuck, first and second fixed rollers, and a moveable roller. The substrate chuck is configured to secure a substrate and to place the substrate into the immersion tank. The first fixed roller is operable to dispense a clamp tape. The second fixed roller is operable to roll the clamp tape. The moveable roller is operable to extend into the immersion tank and to adhere the clamp tape to a substrate tape on the substrate.

Abstract: A novel semiconductor wafer lifter is disclosed for handling wafers during wet bench processing. In particular, the lifter has a plurality of holes formed in its vertical support surface to allow cleaning or rinsing fluid to flow through the vertical support instead of around its sides. These holes facilitates a constant flow of fluid across the wafer during recirculation of the tank contents during etching and rinsing operations, thus ensuring more even etching of all wafers and minimizing the deposition of particulate matter on wafer surfaces.

Abstract: A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectric fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for low-cost, high volume manufacturing of CMOS and CCD color video cameras.

Abstract: A method of forming a bump structure through the use of an electroplating solution, comprising the following steps. A substrate having an overlying conductive structure is provided. A patterned dry film resist is formed over the conductive structure. The patterned dry film resist having a trench exposing a portion of conductive structure. The patterned dry film resist adhering to the conductive structure at an interface. The structure is treated with a treatment that increases the adherence of the patterned dry film resist to the conductive structure at the interface. A conductive plug is over the exposed portion of the conductive structure within the trench through the use of the electroplating solution. The increased adhesion of the patterned dry film resist to the conductive structure at the interface preventing the electroplating solution from penetrating the interface of the patterned dry film resist and the conductive structure during the formation of the conductive plug.

Abstract: A method and system for preventing wafer breakage during wet processing is desscribed. A wet processing tank is provided wherein a wafer is to be placed within the wet processing tank. A sensor is provided within the wet processing tank wherein the sensor continuously counts bubbles formed within the wet processing tank in a time interval. The sensor is queried wherein if a bubble count within the time interval exceeds a trigger point, then an alarm is given so that a process lot will not be entered into the wet processing tank.

Abstract: A new method to form passivation openings in the manufacture of an integrated circuit device is achieved. The passivation openings have gradually sloping sidewalls that allow a protective tape to be completely removed without leaving adhesive residue. A semiconductor substrate is provided. A passivation layer is deposited. An organic photoresist layer is deposited overlying the passivation layer. The organic photoresist layer is patterned to expose the passivation layer in areas where passivation openings are planned. The organic photoresist layer is reflowed to create gradually sloping sidewalls on the organic photoresist layer. The passivation layer is etched through to from the passivation openings. The passivation openings are thereby formed with gradually sloping sidewalls. The organic photoresist layer is stripped away. A protective tape is applied overlying the passivation layer and the passivation openings. The protective tape is removed.

Abstract: A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectric fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for low-cost, high volume manufacturing of CMOS and CCD color video cameras.

Abstract: A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectronic fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for lowcost, high volume manufacturing of CMOS and CCD color video cameras.

Abstract: A method of cleaning particulates from a solution bath including at least partially filling a deionized water (DIW) bath for rinsing at least one wafer following chemically cleaning the at least one wafer; rinsing the at least one wafer; transferring the at least one wafer to a downstream process; at least partially draining the DIW from the DIW bath; at least partially filling the DIW bath with a bath cleaning solution; and, applying at least one source of ultrasonic energy to agitate the bath cleaning solution.

Abstract: A method of cleaning particulates from a solution bath including at least partially filling a deionized water (DIW) bath for rinsing at least one wafer following chemically cleaning the at least one wafer; rinsing the at least one wafer; transferring the at least one wafer to a downstream process; at least partially draining the DIW from the DIW bath; at least partially filling the DIW bath with a bath cleaning solution; and, applying at least one source of ultrasonic energy to agitate the bath cleaning solution.

Abstract: An apparatus and a method for preventing etchant condensation on a wafer surface positioned in a wafer cool-down chamber after plasma etching. The apparatus of the process chamber includes a chamber enclosure of elongated shape with an aperture in a top plate, a heating means mounted on the top plate for heating a wafer through the aperture positioned in the cavity; and an exhaust means in fluid communication with an exhaust opening provided at a back end of the chamber enclosure for evacuating gaseous content in the cavity during and after the heating of the wafer, and for cooling the wafer after the radiant heater is turned off.

Abstract: Pigment-based resists tend to give off a certain amount of organic vapor during exposure. This brings about contamination of the projection lens surface as well as other parts of the system. A method to monitor this accumulation of solvent vapor on the lens surface is disclosed, based on a test matrix (in which exposure time and focal distance are systematically varied) through which a series of images are formed in the resist and then evaluated for quality. A key feature is the test patterns that are used for forming the images. Said patterns are designed so as to maximize the total amount of diffraction that occurs during image formation, thereby maximizing sensitivity to changes in lens quality. Several examples of the test patterns are provided.

Abstract: A method of clearing photoresist on a wafer edge, including the following steps. A wafer having a upper exposed conductive layer is provided. The wafer having a center, an edge and a ring-shaped area proximate the wafer edge. A photoresist layer is formed upon the exposed conductive layer. The photoresist layer is removed from within the ring-shaped area by a rinse process to expose the conductive layer within the ring-shaped area. An oxygen diffusion barrier layer is formed over the photoresist layer.

Abstract: Within a method for forming a color filter image array optoelectronic microelectronic fabrication, and the color filter image array optoelectronic microelectronic fabrication formed employing the method, there is provided a substrate having formed therein a series of photo active regions. There is also formed over the substrate at least one color filter layer having formed therein a color filter region having a concave upper surface. There is also formed upon the at least one color filter layer and planarizing the at least one color filter region having the concave upper surface, a planarizing layer. The planarizing layer provides for enhanced resolution of the color filter image array optoelectronic microelectronic fabrication.

Abstract: A method of forming a bump on a substrate such as a semiconductor wafer or flip chip. The method includes the step of providing a semiconductor device having a contact pad and an upper passivation layer and an opening formed in the upper passivation layer exposing a portion of the contact pad. An under bump metallurgy is deposited over the upper passivation layer and the contact pad. A first photoresist layer is deposited in a liquid state so that the first photoresist layer covers the under bump metallurgy. A second photoresist layer is deposited and the second photoresist layer is a dry film photoresist. The unexposed portions of the first photoresist layer are removed. The remaining portions of the first photoresist layers are removed. The electrically conductive material is reflown to provide a bump on the semiconductor device.

Abstract: A method of forming a bump on a substrate such as a semiconductor wafer or flip chip. The method includes the step of providing a semiconductor device having a contact pad and an upper passivation layer and an opening formed in the upper passivation layer exposing a portion of the contact pad. An under bump metallurgy is deposited over the upper passivation layer and the contact pad. A first photoresist layer is deposited in a liquid state so that the first photoresist layer covers the under bump metallurgy. A second photoresist layer is deposited and the second photoresist layer is a dry film photoresist. The unexposed portions of the first photoresist layer are removed. The remaining portions of the first photoresist layers are removed. The electrically conductive material is reflown to provide a bump on the semiconductor device.

Abstract: A process for reworking a non-reflowed, defective microlens element shape, of an image sensor device, without damage to an underlying spacer layer, or to underlying color filter elements, has been developed. The non-reflowed, microlens element shape, if defective and needing rework, is first subjected to a high energy exposure, converting the non-reflowed, microlens element shape to a acid type, microlens shape, then removed using a base type developer solution. Prior to formation of a reworked microlens element shape a baking cycle is employed to freeze, or render inactive, any organic residue still remaining on the surface of the spacer layer, after the base type developer removal procedure. Formation of the reworked, microlens element shape, followed by an anneal cycle, results in the desired rounded, microlens element, on the underlying spacer layer.

Abstract: Within a method for forming a color filter image array optoelectronic microelectronic fabrication, and the color filter image array optoelectronic microelectronic fabrication formed employing the method, there is provided a substrate having formed therein a series of photo active regions. There is also formed over the substrate at least one color filter layer having formed therein a color filter region having a concave upper surface. There is also formed upon the at least one color filter layer and planarizing the at least one color filter region having the concave upper surface, a planarizing layer. The planarizing layer provides for enhanced resolution of the color filter image array optoelectronic microelectronic fabrication.

Abstract: Multi-microlens arrays for optimizing light collection efficiency in CCD/CMOS solid-state color image cameras with L-shaped or non-regular photodetector areas are disclosed. Microelectronic fabrication methods for forming planar array multi-microlenses comprised of elements consisting of lens-pairs, integrated with color-filters, and compatible with CMOS high-volume manufacturing are taught. Experimental results demonstrating the processes for fabrication of multi-microlenses for L-shaped and for non-regular sensing areas are given.