Abstract: In accordance with some embodiments of the present disclosure an attenuating circuit comprises a balun configured to receive a radio frequency (RF) signal at first and second input ports and configured to output the RF signal. The circuit further comprises an attenuator coupled in parallel with the first and second input ports. A power level of the RF signal output by the balun is based at least partially on an impedance of the attenuator. The attenuator comprises a resistor ladder configured to receive at least a portion of the RF signal and a plurality of switches coupled to the resistor ladder. The plurality of switches are configured to open and close such that the impedance of the attenuator is a function of which switches are open and closed. Therefore, the power of the RF signal is controlled based at least on the opening and closing of the switches.

Abstract: In accordance with some embodiments of the present disclosure an attenuating circuit comprises a balun configured to receive a radio frequency (RF) signal at first and second input ports and configured to output the RF signal. The circuit further comprises an attenuator coupled in parallel with the first and second input ports. A power level of the RF signal output by the balun is based at least partially on an impedance of the attenuator. The attenuator comprises a resistor ladder configured to receive at least a portion of the RF signal and a plurality of switches coupled to the resistor ladder. The plurality of switches are configured to open and close such that the impedance of the attenuator is a function of which switches are open and closed. Therefore, the power of the RF signal is controlled based at least on the opening and closing of the switches.

Abstract: An integrated transmit circuit includes a voltage controlled oscillator (702) for generating an input frequency signal (e.g., VCO) that is provided to a divide by two quadrature generator circuit (706) which generates therefrom in-phase and quadrature clocking signals (I, IB, Q, QB) that are applied to control a plurality of transmission gates (711-718) configured in a matched switching topology (710) so as to selectively pass pulses from the input frequency signal, thereby generating interleaved LO pulses (Ø1, Ø1B, . . . Ø4, Ø4B). By applying the interleaved LO pulses to control the transmission gates (26, 28, 30, 32, 34, 36, 38, and 40) in the upmixer (720), the +I, ?I, +Q, ?Q input signals are interleaved over a plurality of phases of a carrier period to produce differential outputs (42, 44).

Abstract: An integrated transmit circuit includes a voltage controlled oscillator (702) for generating an input frequency signal (e.g., VCO) that is provided to a divide by two quadrature generator circuit (706) which generates therefrom in-phase and quadrature clocking signals (I, IB, Q, QB) that are applied to control a plurality of transmission gates (711-718) configured in a matched switching topology (710) so as to selectively pass pulses from the input frequency signal, thereby generating interleaved LO pulses (Ø1, Ø1B, . . . Ø4, Ø4B). By applying the interleaved LO pulses to control the transmission gates (26, 28, 30, 32, 34, 36, 38, and 40) in the upmixer (720), the +I, ?I, +Q, ?Q input signals are interleaved over a plurality of phases of a carrier period to produce differential outputs (42, 44).