Patents by Inventor Kurt Sorschag
Kurt Sorschag has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230288695Abstract: A microelectromechanical systems (MEMS) mirror package assembly includes: a MEMS wafer including a stator portion and a rotor portion that includes a MEMS mirror configured to rotate about an axis, wherein the MEMS mirror is suspended over a back cavity, wherein the MEMS wafer defines a first portion of the back cavity; a spacer wafer, wherein the backside of the spacer wafer is bonded to the frontside of the MEMS wafer, wherein the spacer wafer defines a first portion of a front cavity arranged over the MEMS mirror; a transparent cover wafer, wherein the backside of the transparent cover wafer is bonded to the frontside of the spacer wafer, wherein the transparent cover wafer includes a transparent dome structure arranged over the MEMS mirror and defining a second portion of the front cavity. The center of the MEMS mirror is arranged substantially at a vertex of the transparent dome structure.Type: ApplicationFiled: March 9, 2022Publication date: September 14, 2023Applicant: Infineon Technologies AGInventors: Andre BROCKMEIER, Ulf BARTL, Kurt SORSCHAG
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Publication number: 20200385264Abstract: In a method of generating a microelectromechanical system, MEMS, device, a MEMS substrate including a movable element is provided. A glass cover member including a glass cover is formed by hot embossing. The glass cover member is bonded to the MEMS substrate so as to hermetically seal by the glass cover a cavity in which the movable element is arranged.Type: ApplicationFiled: June 2, 2020Publication date: December 10, 2020Applicant: Infineon Technologies AGInventors: Andre BROCKMEIER, Rafael JANSKI, Boris KIRILLOV, Marten OLDSEN, Clemens ROESSLER, Francisco Javier SANTOS RODRIGUEZ, Sokratis SGOURIDIS, Kurt SORSCHAG
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Patent number: 9963381Abstract: Embodiments of the present invention provide a method for finishing a glass product including a glass layer, the glass layer comprising boron. The method includes the step of cleaning the glass layer in order to remove boron at least at the surface of the glass layer. The step of cleaning includes the substep of esterification using a medium comprising an alcohol.Type: GrantFiled: July 24, 2015Date of Patent: May 8, 2018Assignee: INFINEON TECHNOLOGIES AGInventors: David Baum, Kurt Sorschag, Martin Kulterer
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Patent number: 9837280Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate having an upper side and comprising, in a vertical cross-section substantially orthogonal to the upper side, a plurality of semiconductor mesas of a first monocrystalline semiconductor material which are spaced apart from each other by sacrificial layers selectively etchable with respect to the first monocrystalline semiconductor material and arranged in trenches extending from the upper side into the semiconductor substrate, forming on the semiconductor mesas a support structure mechanically connecting the semiconductor mesas, at least partly replacing the sacrificial layers while the semiconductor mesas remain mechanically connected via the support structure, and at least partly removing the support structure.Type: GrantFiled: August 5, 2016Date of Patent: December 5, 2017Assignee: Infineon Technologies Dresden GmbHInventors: Kurt Sorschag, Daniel Sarlette, Felix Braun, Marcel Heller, Dieter Kaiser, Ingo Meusel, Marko Lemke, Anton Mauder, Helmut Strack
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Publication number: 20170022095Abstract: Embodiments of the present invention provide a method for finishing a glass product including a glass layer, the glass layer comprising boron. The method includes the step of cleaning the glass layer in order to remove boron at least at the surface of the glass layer. The step of cleaning includes the substep of esterification using a medium comprising an alcohol.Type: ApplicationFiled: July 24, 2015Publication date: January 26, 2017Inventors: Kurt Sorschag, David Baum, Martin Kulterer
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Publication number: 20160343577Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate having an upper side and comprising, in a vertical cross-section substantially orthogonal to the upper side, a plurality of semiconductor mesas of a first monocrystalline semiconductor material which are spaced apart from each other by sacrificial layers selectively etchable with respect to the first monocrystalline semiconductor material and arranged in trenches extending from the upper side into the semiconductor substrate, forming on the semiconductor mesas a support structure mechanically connecting the semiconductor mesas, at least partly replacing the sacrificial layers while the semiconductor mesas remain mechanically connected via the support structure, and at least partly removing the support structure.Type: ApplicationFiled: August 5, 2016Publication date: November 24, 2016Inventors: Kurt Sorschag, Daniel Sarlette, Felix Braun, Marcel Heller, Dieter Kaiser, Ingo Meusel, Marko Lemke, Anton Mauder, Helmut Strack
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Patent number: 9437440Abstract: A method for producing a semiconductor device is provided. The method includes: forming in a semiconductor substrate a plurality of semiconductor mesas extending to an upper side so that adjacent semiconductor mesas are spaced apart from each other by one of a substantially empty trench and a trench substantially filled with a sacrificial layer selectively etchable with respect to the semiconductor mesas; forming a support structure mechanically connecting the semiconductor mesas spaced apart from each other by one of the substantially empty trench and the trench substantially filled with the sacrificial layer; and processing the semiconductor substrate from the upper side while the semiconductor mesas are mechanically connected via the support structure.Type: GrantFiled: October 25, 2013Date of Patent: September 6, 2016Assignee: Infineon Technologies Dresden GmbHInventors: Kurt Sorschag, Daniel Sarlette, Felix Braun, Marcel Heller, Dieter Kaiser, Ingo Meusel, Marko Lemke, Anton Mauder, Helmut Strack
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Patent number: 9112053Abstract: A semiconductor device with a dielectric layer is produced by providing a semiconductor body with a first trench extending into the semiconductor body, the first trench having a bottom and a sidewall. A first dielectric layer is formed on the sidewall in a lower portion of the first trench and a first plug is formed in the lower portion of the first trench so as to cover the first dielectric layer. The first plug leaves an upper portion of the sidewall uncovered. A sacrificial layer is formed on the sidewall in the upper portion of the first trench and a second plug is formed in the upper portion of the first trench. The sacrificial layer is removed so as to form a second trench having sidewalls and a bottom. A second dielectric layer is formed in the second trench and extends to the first dielectric layer.Type: GrantFiled: June 29, 2012Date of Patent: August 18, 2015Assignee: Infineon Technologies Austria AGInventors: Hans Weber, Franz Hirler, Andreas Meiser, Anton Mauder, Kurt Sorschag, Stefan Gamerith, Roman Knoefler
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Patent number: 9054123Abstract: A method for producing a semiconductor device is provided. The method includes: providing a wafer including an upper surface and a plurality of semiconductor mesas extending to the upper surface; forming a first support structure made of a first material and adjoining the plurality of semiconductor mesas at the upper surface so that adjacent pairs of the plurality of semiconductor mesas are bridged by the first support structure; forming a second support structure made of a second material different from the first material and adjoining the plurality of semiconductor mesas at the upper surface so that the adjacent pairs of the plurality of semiconductor mesas are bridged by the second support structure; removing the first support structure; and at least partly removing the second support structure.Type: GrantFiled: November 21, 2012Date of Patent: June 9, 2015Assignee: Infineon Technologies Austria AGInventor: Kurt Sorschag
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Publication number: 20140141602Abstract: A method for producing a semiconductor device is provided. The method includes: forming in a semiconductor substrate a plurality of semiconductor mesas extending to an upper side so that adjacent semiconductor mesas are spaced apart from each other by one of a substantially empty trench and a trench substantially filled with a sacrificial layer selectively etchable with respect to the semiconductor mesas; forming a support structure mechanically connecting the semiconductor mesas spaced apart from each other by one of the substantially empty trench and the trench substantially filled with the sacrificial layer; and processing the semiconductor substrate from the upper side while the semiconductor mesas are mechanically connected via the support structure.Type: ApplicationFiled: October 25, 2013Publication date: May 22, 2014Inventors: Kurt Sorschag, Daniel Sarlette, Felix Braun, Marcel Heller, Dieter Kaiser, Ingo Meusel, Marko Lemke, Anton Mauder, Helmut Strack
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Publication number: 20140141594Abstract: A method for producing a semiconductor device is provided. The method includes: providing a wafer including an upper surface and a plurality of semiconductor mesas extending to the upper surface; forming a first support structure made of a first material and adjoining the plurality of semiconductor mesas at the upper surface so that adjacent pairs of the plurality of semiconductor mesas are bridged by the first support structure; forming a second support structure made of a second material different from the first material and adjoining the plurality of semiconductor mesas at the upper surface so that the adjacent pairs of the plurality of semiconductor mesas are bridged by the second support structure; removing the first support structure; and at least partly removing the second support structure.Type: ApplicationFiled: November 21, 2012Publication date: May 22, 2014Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventor: Kurt Sorschag
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Publication number: 20130075801Abstract: A method for producing a capacitive structure in a semiconductor body includes forming a first trench in a first surface of the semiconductor body, forming a first dielectric layer on sidewalls and the bottom of the first trench, forming a first electrode layer on the first dielectric layer, forming at least one second trench by removing at least one part of the first dielectric layer to form a first gap in the first surface, and by widening the first gap, forming a second dielectric layer on sidewalls and the bottom of the at least one second trench, and forming a second electrode layer on the second dielectric layer.Type: ApplicationFiled: September 23, 2011Publication date: March 28, 2013Applicant: Infineon Technologies Austria AGInventors: Hans Weber, Roman Knoefler, Kurt Sorschag
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Patent number: 8399325Abstract: A method for producing a semiconductor device with an electrode structure includes providing a semiconductor body with a first surface, and with a first sacrificial layer extending in a vertical direction of the semiconductor body from the first surface, and forming a first trench extending from the first surface into the semiconductor body. The first trench is formed at least by removing the sacrificial layer in a section adjacent to the first surface. The method further includes forming a second trench by isotropically etching the semiconductor body in the first trench, forming a dielectric layer which covers sidewalls of the second trench, and forming an electrode on the dielectric layer in the second trench, the electrode and the dielectric layer in the second trench forming the electrode structure.Type: GrantFiled: September 22, 2011Date of Patent: March 19, 2013Assignee: Infineon Technologies Austria AGInventors: Hans Weber, Stefan Gamerith, Roman Knoefler, Kurt Sorschag, Anton Mauder
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Publication number: 20130005099Abstract: A semiconductor device with a dielectric layer is produced by providing a semiconductor body with a first trench extending into the semiconductor body, the first trench having a bottom and a sidewall. A first dielectric layer is formed on the sidewall in a lower portion of the first trench and a first plug is formed in the lower portion of the first trench so as to cover the first dielectric layer. The first plug leaves an upper portion of the sidewall uncovered. A sacrificial layer is formed on the sidewall in the upper portion of the first trench and a second plug is formed in the upper portion of the first trench. The sacrificial layer is removed so as to form a second trench having sidewalls and a bottom. A second dielectric layer is formed in the second trench and extends to the first dielectric layer.Type: ApplicationFiled: June 29, 2012Publication date: January 3, 2013Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Hans Weber, Franz Hirler, Andreas Meiser, Anton Mauder, Kurt Sorschag, Stefan Gamerith, Roman Knoefler
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Patent number: 8288230Abstract: A transistor with a gate electrode structure is produced by providing a semiconductor body with a first surface, and with a first sacrificial layer extending in a vertical direction of the semiconductor body from the first surface. A first trench extending from the first surface into the semiconductor body is formed by removing the sacrificial layer in a section adjacent the first surface. A second trench is formed by isotropically etching the semiconductor body in the first trench. A third trench is formed below the second trench by removing at least a part of the first sacrificial layer below the second trench. A dielectric layer is formed which at least covers sidewalls of the third trench and which only covers sidewalls of the second trench. A gate electrode is formed on the dielectric layer in the second trench. The gate electrode and dielectric layer in the second trench form the gate electrode structure.Type: GrantFiled: September 30, 2010Date of Patent: October 16, 2012Assignee: Infineon Technologies Austria AGInventors: Hans Weber, Stefan Gamerith, Roman Knoefler, Kurt Sorschag, Anton Mauder
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Publication number: 20120083085Abstract: A method for producing a semiconductor device with an electrode structure includes providing a semiconductor body with a first surface, and with a first sacrificial layer extending in a vertical direction of the semiconductor body from the first surface, and forming a first trench extending from the first surface into the semiconductor body. The first trench is formed at least by removing the sacrificial layer in a section adjacent to the first surface. The method further includes forming a second trench by isotropically etching the semiconductor body in the first trench, forming a dielectric layer which covers sidewalls of the second trench, and forming an electrode on the dielectric layer in the second trench, the electrode and the dielectric layer in the second trench forming the electrode structure.Type: ApplicationFiled: September 22, 2011Publication date: April 5, 2012Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Hans Weber, Stefan Gamerith, Roman Knoefler, Kurt Sorschag, Anton Mauder
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Publication number: 20120083081Abstract: A transistor with a gate electrode structure is produced by providing a semiconductor body with a first surface, and with a first sacrificial layer extending in a vertical direction of the semiconductor body from the first surface. A first trench extending from the first surface into the semiconductor body is formed by removing the sacrificial layer in a section adjacent the first surface. A second trench is formed by isotropically etching the semiconductor body in the first trench. A third trench is formed below the second trench by removing at least a part of the first sacrificial layer below the second trench. A dielectric layer is formed which at least covers sidewalls of the third trench and which only covers sidewalls of the second trench. A gate electrode is formed on the dielectric layer in the second trench. The gate electrode and dielectric layer in the second trench form the gate electrode structure.Type: ApplicationFiled: September 30, 2010Publication date: April 5, 2012Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Hans Weber, Stefan Gamerith, Roman Knoefler, Kurt Sorschag, Anton Mauder