Abstract: Disclosed is an apparatus for processing a substrate, the apparatus including: a housing providing a processing space therein; support unit disposed within the housing and supporting a substrate; and a plasma generating unit provided above the housing, in which the plasma supplying unit includes: a plasma chamber with a discharge space formed inside; a diffusion member provided between the plasma chamber and the housing, and diffusing plasma; a plasma source for generating plasma in the discharge space from process gas; and a sealing member provided between a lower flange of the plasma chamber and an upper flange of the diffusion member, and the sealing member includes: an inner sealing member inserted into a mounting groove formed in an upper surface of the upper flange; and an outer sealing member inserted into a space formed by combination of the upper flange and the lower flange, and positioned at a further outward side from the discharge space than the inner sealing member.

Abstract: Disclosed herein is an apparatus for processing a substrate. The apparatus comprises: a process processing unit for providing a processing space in which a substrate processing is performed; a plasma generation unit for generating plasma, wherein the plasma generation unit comprises: a plasma chamber having a plasma generation space; a gas supply unit for supplying a processing gas to the plasma generation space; a power application unit for generating plasma by exiting the processing gas in the plasma generation space; a diffusion chamber disposed below the plasma chamber and having a diffusion space for diffusing the plasma generated in the plasma generation space and/or the processing gas supplied to the plasma generation space to be uniformly delivered to the processing space, wherein at least one perforated diffusion plate may be disposed in the diffusion space.

Abstract: An ESC may include a dielectric layer, an electrode, a pedestal, a heater, an adhesive and a protecting ring. The dielectric layer may be configured to support a substrate. The electrode may be disposed in the dielectric layer and is configured to form plasma over the substrate. The pedestal may be disposed under the dielectric layer. The heater may be disposed between the pedestal and the dielectric layer and is configured to heat the substrate. The adhesive may be disposed between the pedestal and the heater, and between the heater and the dielectric layer. The protecting ring may be configured to surround the adhesive. The protecting ring may include a plasma-resistant material.

Abstract: An ESC may include a dielectric layer, an electrode, a pedestal, a heater, an adhesive and a protecting ring. The dielectric layer may be configured to support a substrate. The electrode may be disposed in the dielectric layer and is configured to form plasma over the substrate. The pedestal may be disposed under the dielectric layer. The heater may be disposed between the pedestal and the dielectric layer and is configured to heat the substrate. The adhesive may be disposed between the pedestal and the heater, and between the heater and the dielectric layer. The protecting ring may be configured to surround the adhesive. The protecting ring may include a plasma-resistant material.

Abstract: In a fuse region of a semiconductor device, and a method of fabricating the same, the fuse region includes an interlayer insulating layer on a semiconductor substrate, a plurality of fuses on the interlayer insulating layer disposed in parallel with each other, a blocking layer on the interlayer insulating layer between each of the plurality of fuses and in parallel with the plurality of fuses, and a plurality of fuse grooves recessed into the interlayer insulating layer between each of the plurality of fuses and the blocking layer.

Abstract: In a fuse region of a semiconductor device, and a method of fabricating the same, the fuse region includes an interlayer insulating layer on a semiconductor substrate, a plurality of fuses on the interlayer insulating layer disposed in parallel with each other, a blocking layer on the interlayer insulating layer between each of the plurality of fuses and in parallel with the plurality of fuses, and a plurality of fuse grooves recessed into the interlayer insulating layer between each of the plurality of fuses and the blocking layer.