Patents by Inventor Kwang HU
Kwang HU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11966544Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The display may include transistors with gate conductors, a first planarization layer formed over the gate conductors, one or more contacts formed in a first source-drain layer within the first planarization layer, a second planarization layer formed on the first planarization layer, one or more data lines formed in a second source-drain layer within the second planarization layer, a third planarization layer formed on the second planarization layer, and a data line shielding structure formed at least partly in a third source-drain layer within the third planarization layer. The data line shielding structure may be a routing line, a blanket layer, a mesh layer formed in one or more metal layers, and/or a data line covering another data line.Type: GrantFiled: May 25, 2023Date of Patent: April 23, 2024Assignee: Apple Inc.Inventors: Shinya Ono, Suhwan Moon, Dong-Gwang Ha, Jiaxi Hu, Hao-Lin Chiu, Kwang Soon Park, Hassan Edrees, Wen-I Hsieh, Jiun-Jye Chang, Chin-Wei Lin, Kyung Wook Kim
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Patent number: 9885546Abstract: A multi-contact type position detection apparatus for a target board includes a first membrane board having a plurality of first signal lines formed in a first direction, a second membrane board having a plurality of second signal lines formed in a second direction, and a plurality of dots which are formed on the first membrane board or the second membrane board such that the first membrane plate and the second membrane plate are spaced at a predetermined distance from each other, wherein the plurality of dots can be arranged at a distance of “k/2±A (A is 1%˜2% of k)” when a magnetic body diameter of a pin attached on the target board is “kmm”.Type: GrantFiled: November 24, 2014Date of Patent: February 6, 2018Assignee: 3IP HANGUNG CO., LTDInventor: Kwang Hu
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Publication number: 20170131068Abstract: A multi-contact type position detection apparatus for a target board includes a first membrane board having a plurality of first signal lines formed in a first direction, a second membrane board having a plurality of second signal lines formed in a second direction, and a plurality of dots which are formed on the first membrane board or the second membrane board such that the first membrane plate and the second membrane plate are spaced at a predetermined distance from each other, wherein the plurality of dots can be arranged at a distance of “k/2±A (A is 1%˜2% of k)” when a magnetic body diameter of a pin attached on the target board is “kmm”.Type: ApplicationFiled: November 24, 2014Publication date: May 11, 2017Inventor: Kwang HU
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Patent number: 7954040Abstract: The invention relates to an encoding method for encoding a codeword to obtain a parity code. The code is embedded in the codeword and divides the codeword to have intermediate symbol locations between a first and a second set of data symbols. Each data symbol forms a coefficient. The first and the second set of data symbols and the parity code respectively form a first polynomial (M1(x)), a second polynomial (M2(x)), and a parity code polynomial (R(x)). The method comprises: first, designing a first code generator polynomial (G1(x)); next, dividing M1(x)x4 by G1(x) to obtain a first remainder polynomial (R1(x)); next, generating a second code generator polynomial (G2(x)) from G1(x); next, generating a third polynomial (M3(x)); next, dividing M3(x)x4 by G2(x) to obtain a second remainder polynomial (R2(x)); next, performing an adding procedure to R1(x) and R2(x) to obtain R(x); finally, obtaining the parity code from each coefficient of R(x).Type: GrantFiled: September 27, 2007Date of Patent: May 31, 2011Assignee: MediaTek Inc.Inventors: Yi-Kwang Hu, Jin-Bin Yang, Hsi-Chia Chang
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Patent number: 7472333Abstract: The invention relates to an encoding method for encoding a codeword to obtain a parity code. The code is embedded in the codeword and divides the codeword to have intermediate symbol locations between a first and a second set of data symbols. Each data symbol forms a coefficient. The first and the second set of data symbols and the parity code respectively form a first polynomial (M1(x)), a second polynomial (M2(x)), and a parity code polynomial (R(x)).Type: GrantFiled: October 22, 2004Date of Patent: December 30, 2008Assignee: MediaTek, Inc.Inventors: Yi-Kwang Hu, Jin-Bin Yang, Hsi-Chia Chang
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Publication number: 20080022192Abstract: The invention relates to an encoding method for encoding a codeword to obtain a parity code. The code is embedded in the codeword and divides the codeword to have intermediate symbol locations between a first and a second set of data symbols. Each data symbol forms a coefficient. The first and the second set of data symbols and the parity code respectively form a first polynomial (M1(x)), a second polynomial (M2(x)), and a parity code polynomial (R(x)). The method comprises: first, designing a first code generator polynomial (G1(x)); next, dividing M1(x)x4 by G1(x) to obtain a first remainder polynomial (R1(x)); next, generating a second code generator polynomial (G2(x)) from G1(x); next, generating a third polynomial (M3(x)); next, dividing M3(x)x4 by G2(x) to obtain a second remainder polynomial (R2(x)); next, performing an adding procedure to R1(x) and R2(x) to obtain R(x); finally, obtaining the parity code from each coefficient of R(x).Type: ApplicationFiled: September 27, 2007Publication date: January 24, 2008Inventors: Yi-Kwang Hu, Jin-Bin Yang, Hsi-Chia Chang
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Patent number: 7049874Abstract: A digital delaying device for delaying an input signal includes a ring oscillator, a calibration unit, and at least one delay number calculation unit and delay channel. The ring oscillator includes loop-connected delay cells for outputting an oscillation clock. The calibration unit receives a reference clock and the oscillation clock and calculates a pulse number of the oscillation clock corresponding to each reference clock period. The pulse number serves as a period reference pulse number. The calculation unit receives the pulse number and a signal delay value, calculates a signal delay number corresponding to the signal delay value according to the pulse number, and outputs a selection signal. The delay channel includes a multiplexer and cascaded delay cells, which receives an input signal and generates delay signals with different delay timings. The multiplexer selects and outputs one of the delay signals as an output signal according to the selection signal.Type: GrantFiled: October 30, 2003Date of Patent: May 23, 2006Assignee: MediaTek Inc.Inventors: Chih-Ching Chen, Jyh-Shin Pan, Ming-Yang Chao, Yi Kwang Hu
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Publication number: 20050120285Abstract: The invention relates to an encoding method for encoding a codeword to obtain a parity code. The code is embedded in the codeword and divides the codeword to have intermediate symbol locations between a first and a second set of data symbols. Each data symbol forms a coefficient. The first and the second set of data symbols and the parity code respectively form a first polynomial (M1(x)), a second polynomial (M2(x)), and a parity code polynomial (R(x)). The method comprises: first, designing a first code generator polynomial (G1(x)); next, dividing M1(x)x4 by G1(x) to obtain a first remainder polynomial (R1(x)); next, generating a second code generator polynomial (G2(x)) from G1(x); next, generating a third polynomial (M3(x)); next, dividing M3(x)x4 by G2(x) to obtain a second remainder polynomial (R2(x)); next, performing an adding procedure to R1(x) and R2(x) to obtain R(x); finally, obtaining the parity code from each coefficient of R(x).Type: ApplicationFiled: October 22, 2004Publication date: June 2, 2005Inventors: Yi-Kwang Hu, Jin-Bin Yang, Hsi-Chia Chang
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Publication number: 20040091096Abstract: A digital delaying device for delaying an input signal includes a ring oscillator, a calibration unit, and at least one delay number calculation unit and delay channel. The ring oscillator includes loop-connected delay cells for outputting an oscillation clock. The calibration unit receives a reference clock and the oscillation clock and calculates a pulse number of the oscillation clock corresponding to each reference clock period. The pulse number serves as a period reference pulse number. The calculation unit receives the pulse number and a signal delay value, calculates a signal delay number corresponding to the signal delay value according to the pulse number, and outputs a selection signal. The delay channel includes a multiplexer and cascaded delay cells, which receives an input signal and generates delay signals with different delay timings. The multiplexer selects and outputs one of the delay signals as an output signal according to the selection signal.Type: ApplicationFiled: October 30, 2003Publication date: May 13, 2004Inventors: Chih-Ching Chen, Jyh-Shin Pan, Ming-Yang Chao, Yi Kwang Hu
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Patent number: 6282244Abstract: An apparatus and method for decoding compressed digital video data which has been compressed, for example in a format compliant with the Motion Picture Experts Group I (MPEG) standard or the Joint Picture Experts Group (JPEG) standard. The apparatus and method allows a fast decoding rate for the compressed digital video data. A variable length decoding (VLD) circuit is used to generate a first bit sequence of a fixed length by decoding the received compressed digital video data. Then, an inverse quantizer is used to convert the first bit sequence by inverse quantization into a second bit sequence. A zig-zag buffer is then used to store the second bit sequence at specific locations and output a plurality of frequency-division binary signal bits concurrently in parallel. An inverse discrete cosine transfer (IDCT) circuit is used to process the plurality of frequency-division binary signal bits according to an inverse discrete cosine transfer function, to generate a plurality of time-division binary signal bits.Type: GrantFiled: August 20, 1996Date of Patent: August 28, 2001Assignee: United Microelectronics Corp.Inventor: Yi-Kwang Hu
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Patent number: 6170043Abstract: A CD-ROM control chip is provided for a use of firmware information update in the CD-ROM system. The control chip at least includes a microprocessor, a decoder, a controller, and an extra memory. The microprocessor is coupled to a data bus, and further coupled to an external ROM, which stores all firmware information. The decoder is coupled to the microprocessor through the data bus, and is also coupled to an external buffer memory and an external main board interface. The external main board interface allows the CD-ROM control chip to communicate with an external computer. The controller is coupled to the decoder, and is coupled to the microprocessor the data bus. The controller is used to receive information and control signals from an external CD. The extra memory is coupled to the microprocessor through the data bus.Type: GrantFiled: January 22, 1999Date of Patent: January 2, 2001Assignee: Media Tek Inc.Inventor: Yi-Kwang Hu