Abstract: Disclosed is a method of manufacturing a polyurethane filter foam having excellent air permeability, elasticity, and restoring force. In the method of manufacturing the polyurethane filter foam, the cell size of the filter foam is made regular by controlling the pressure by adjusting the diameter of the foaming head of a foaming machine, rather than adding a cell opener, cell irregularity caused by poor dispersion of the cell opener is alleviated, and air permeability, porosity, and compression set are excellent.

Abstract: Disclosed is a process for producing light olefins from hydrocarbon feedstock. The process is characterized in that a porous molecular sieve catalyst consisting of a product obtained by evaporating water from a raw material mixture comprising a molecular sieve with a framework of Si—OH—Al— groups, a water-insoluble metal salt, and a phosphate compound, is used to produce light olefins, particularly ethylene and propylene, from hydrocarbon, while maintaining excellent selectivity to light olefins. According to the process, by the use of a specific catalyst with hydrothermal stability, light olefins can be selectively produced in high yield with high selectivity from hydrocarbon feedstock, particularly full-range naphtha. In particular, the process can maintain higher cracking activity than the reaction temperature required in the prior thermal cracking process for the production of light olefins, and thus, can produce light olefins with high selectivity and conversion from hydrocarbon feedstock.

Abstract: Disclosed are a hydrothermally stable porous molecular sieve catalyst and a preparation method thereof. The catalyst consists of a product obtained by the evaporation of water from a raw material mixture comprising a molecular sieve having a framework of Si—OH—Al—, a water-insoluble metal salt and a phosphate compound. The catalyst maintains its physical and chemical stabilities even in an atmosphere of high temperature and humidity. Accordingly, the catalyst shows excellent catalytic activity even when it is used in a severe process environment of high temperature and humidity in heterogeneous catalytic reactions, such as various oxidation/reduction reactions, including catalytic cracking reactions, isomerization reactions, alkylation reactions and esterification reactions.

Abstract: Disclosed is a semiconductor device. The semiconductor device includes; a pair of drift regions formed in a semiconductor substrate; a trench region formed between the pair of drift regions; an oxide layer spacer on both sidewalls of the trench region; a gate formed in the trench region; and a source and a drain formed in the pair of the drift regions, respectively.

Abstract: There is provided a high voltage semiconductor device comprising: a semiconductor substrate of a first conductivity type, including a first region, a second region relatively lower than the first region, and a sloped region between the first region and the second region; a drift region of a second conductivity type, formed on the second region; a source region of the second conductivity type, disposed on the first region, and spaced apart from the drift region by the sloped region; a drain region of the second conductivity type, disposed on the drift region; a field plate positioned on the drift region in the second region; a gate insulating layer disposed between the source region and the drift region; and a gate electrode layer, which is disposed on the gate insulating layer and extends to above the field plate.

Abstract: Disclosed are a hydrothermally stable porous molecular sieve catalyst and a preparation method thereof. The catalyst consists of a product obtained by the evaporation of water from a raw material mixture comprising a molecular sieve having a framework of Si—OH—Al—, a water-insoluble metal salt and a phosphate compound. The catalyst maintains its physical and chemical stabilities even in an atmosphere of high temperature and humidity. Accordingly, the catalyst shows excellent catalytic activity even when it is used in a severe process environment of high temperature and humidity in heterogeneous catalytic reactions, such as various oxidation/reduction reactions, including catalytic cracking reactions, isomerization reactions, alkylation reactions and esterification reactions.

Abstract: A system for providing an interactive broadcast service and method thereof are disclosed, by which a communication service and an interactive broadcast service can be unitedly supported in an IMS (Internet protocol Multimedia Subsystem) environment. The present invention includes a first server receiving a message of the protocol from the UE and making a registration for a service subscription for the UE from subscription-related information included in the message, a first media server receiving a multimedia stream of the broadcast service to be transmitted to the registered UE from a corresponding broadcasting network, and a second media server connected to the broadcasting network, converting interaction data inserted in the message of the protocol received from the UE to a signal format supported by the broadcasting network.

Abstract: Disclosed is a process for producing light olefins from hydrocarbon feedstock. The process is characterized in that a porous molecular sieve catalyst consisting of a product obtained by evaporating water from a raw material mixture comprising a molecular sieve with a framework of Si—OH—Al— groups, a water-insoluble metal salt, and a phosphate compound, is used to produce light olefins, particularly ethylene and propylene, from hydrocarbon, while maintaining excellent selectivity to light olefins. According to the process, by the use of a specific catalyst with hydrothermal stability, light olefins can be selectively produced in high yield with high selectivity from hydrocarbon feedstock, particularly full-range naphtha. In particular, the process can maintain higher cracking activity than the reaction temperature required in the prior thermal cracking process for the production of light olefins, and thus, can produce light olefins with high selectivity and conversion from hydrocarbon feedstock.

Abstract: A semiconductor device having a high-voltage transistor and a polysilicon-insulator-polysilicon (PIP) capacitor, and a method for fabricating the same are provided. A current flow path of the high-voltage transistor is widened to reduce on-resistance of the device. Thus, electric characteristics of the device are enhanced. The semiconductor device includes a substrate having a high-voltage transistor area and a PIP capacitor area, an extended drain region disposed in the high-voltage transistor area and separated from a source region, an impurity region formed in an upper portion of the extended drain region, and a drain region formed on a surface of the substrate and disposed within the impurity region.

Abstract: A semiconductor device includes a substrate including a high-voltage transistor area provided with a high-voltage transistor and a low-voltage transistor area provided with a low-voltage transistor; a LOCOS layer provided as a device isolation layer of the high-voltage transistor area; and a shallow-trench isolation layer provided as a device isolation layer of the low-voltage transistor area. Accordingly, a sufficient breakdown voltage level can be provided in a high-voltage transistor area, on-resistance and leakage current can be enhanced, and the chip area in a low-voltage transistor area can be reduced.

Abstract: A high-voltage transistor having a low on-resistance and fabricating method thereof are provided. The high-voltage transistor includes a substrate; a shallow-trench isolation layer provided to an upper part of the substrate to a prescribed depth to define an active area; an extended drain region enclosing the shallow-trench isolation layer; a source region provided to an upper part of the substrate to be spaced apart from the extended drain region by a channel area; a drain region provided beneath the shallow-trench isolation layer within the extended drain region; a gate insulating layer pattern provided on the channel area; and a gate conductive layer pattern provided on the gate insulating layer pattern.

Abstract: The present invention provides a method of fabricating a high voltage device using double expitaxial growth, by which an optimized device can be fabricated in a manner of differentiating epitaxial layers of high and low voltage devices in thickness and by which a chip size can be reduced. The present invention includes the steps of forming a first impurity-buried layer on a substrate, forming a first epitaxial layer on the substrate, forming a second impurity-buried layer on the first epitaxial layer not to be overlapped with the first impurity-buried layer, forming a second epitaxial layer on the first epitaxial layer; forming first and second wells on the first and second impurity-buried layers by ion implantation, respectively, and annealing the substrate including the first and second wells.

Abstract: The present invention provides a method of fabricating a self-aligned bipolar transistor, by which the fabricating method can be simplified by forming P+ and N+ junctions by self-alignment and by which device reliability can be enhanced. The present invention includes the steps of forming a well in a substrate isolated by a device isolation layer, forming a polysilicon gate on the substrate, forming an insulating layer on the substrate, forming a sidewall spacer on lateral sides of the polysilicon gate by etching the insulating layer, forming a P+ ion implanted region in the substrate, forming an N+ ion implanted region in the substrate, and forming silicide on the P+ and N+ ion implanted regions.

Abstract: The present invention provides a method of fabricating a high-voltage CMOS device, in which an extended drain region failing to enclose a heavily-doped drain region is separated from a high current flow path to enable high electric field concentration and breakdown to occur within a bulk of a silicon substrate and by which device reliability can be enhanced. The present invention includes the steps of forming a pad oxide layer on a substrate, forming a heavily doped drain region, a heavily doped source region, a source region, and an extended drain region failing to enclose the heavily doped drain region by ion implantation using a pattern provided on the pad oxide layer, forming a field oxide layer on a prescribed area of the extended drain region, and forming a gate and a gate spacer over the substrate.