Patents by Inventor Kwang-Ming Lin
Kwang-Ming Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11989966Abstract: A method for forming semiconductor devices includes providing a substrate with a conductive pad formed thereon; forming a transparent structure over the substrate, wherein the transparent structure includes a plurality of collimating pillars adjacent to the conductive pad; forming a light-shielding structure over the plurality of collimating pillars and the conductive pad; performing a cutting process to remove one or more materials directly above the conductive pad, while leaving remaining material to cover the conductive pad, wherein the material includes a portion of the light-shielding structure; and performing an etching process to remove the remaining material to expose the conductive pad.Type: GrantFiled: October 8, 2021Date of Patent: May 21, 2024Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Chih-Hsien Chen
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Patent number: 11955397Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.Type: GrantFiled: November 9, 2020Date of Patent: April 9, 2024Assignee: Vanguard International Semiconductor CorporationInventors: Shin-Cheng Lin, Cheng-Wei Chou, Ting-En Hsieh, Yi-Han Huang, Kwang-Ming Lin, Yung-Fong Lin, Cheng-Tao Chou, Chi-Fu Lee, Chia-Lin Chen, Shu-Wen Chang
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Patent number: 11569121Abstract: Methods of forming semiconductor devices are provided. The methods include: forming a trench in a substrate, wherein the trench includes a defect protruding from a bottom surface of the trench; forming a flowable material on the substrate to at least partially cover the defect; performing an etching process to reduce the height of the defect; and removing the flowable material.Type: GrantFiled: May 26, 2021Date of Patent: January 31, 2023Assignee: Vanguard International Semiconductor CorporationInventors: I-Ping Lee, Kwang-Ming Lin, Chih-Cherng Liao, Ya-Huei Kuo, Pei-Yu Chang, Ya-Ting Chang, Tsung-Hsiung Lee, Zheng-Xian Wu, Kai-Chuan Kan, Yu-Jui Chang, Yow-Shiuan Liu
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Publication number: 20220384251Abstract: Methods of forming semiconductor devices are provided. The methods include: forming a trench in a substrate, wherein the trench includes a defect protruding from a bottom surface of the trench; forming a flowable material on the substrate to at least partially cover the defect; performing an etching process to reduce the height of the defect; and removing the flowable material.Type: ApplicationFiled: May 26, 2021Publication date: December 1, 2022Applicant: Vanguard International Semiconductor CorporationInventors: I-Ping LEE, Kwang-Ming LIN, Chih-Cherng LIAO, Ya-Huei KUO, Pei-Yu CHANG, Ya-Ting CHANG, Tsung-Hsiung LEE, Zheng-Xian WU, Kai-Chuan KAN, Yu-Jui CHANG, Yow-Shiuan LIU
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Publication number: 20220148938Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.Type: ApplicationFiled: November 9, 2020Publication date: May 12, 2022Applicant: Vanguard International Semiconductor CorporationInventors: Shin-Cheng LIN, Cheng-Wei CHOU, Ting-En HSIEH, Yi-Han HUANG, Kwang-Ming LIN, Yung-Fong LIN, Cheng-Tao CHOU, Chi-Fu LEE, Chia-Lin CHEN, Shu-Wen CHANG
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Patent number: 11315964Abstract: An optical sensor includes pixels disposed in a substrate. A light collimating layer is disposed on the substrate and includes a transparent layer, a light-shielding layer, and transparent pillars. The transparent layer blanketly disposed on the substrate covers the pixels and the region between the pixels. The light-shielding layer is disposed on the transparent layer and between the transparent pillars. The transparent pillars penetrating through the light-shielding layer are correspondingly disposed on the pixels.Type: GrantFiled: February 1, 2019Date of Patent: April 26, 2022Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
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Publication number: 20220029035Abstract: A method for forming semiconductor devices includes providing a substrate with a conductive pad formed thereon; forming a transparent structure over the substrate, wherein the transparent structure includes a plurality of collimating pillars adjacent to the conductive pad; forming a light-shielding structure over the plurality of collimating pillars and the conductive pad; performing a cutting process to remove one or more materials directly above the conductive pad, while leaving remaining material to cover the conductive pad, wherein the material includes a portion of the light-shielding structure; and performing an etching process to remove the remaining material to expose the conductive pad.Type: ApplicationFiled: October 8, 2021Publication date: January 27, 2022Applicant: Vanguard International Semiconductor CorporationInventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Chih-Hsien CHEN
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Patent number: 11177397Abstract: A method for forming semiconductor devices includes providing a substrate with a conductive pad formed thereon; forming a transparent structure over the substrate, wherein the transparent structure includes a plurality of collimating pillars adjacent to the conductive pad; forming a light-shielding structure over the plurality of collimating pillars and the conductive pad; performing a cutting process to remove one or more materials directly above the conductive pad, while leaving remaining material to cover the conductive pad, wherein the material includes a portion of the light-shielding structure; and performing an etching process to remove the remaining material to expose the conductive pad.Type: GrantFiled: January 9, 2020Date of Patent: November 16, 2021Assignee: Vanguard International Semiconductor CorporationInventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Chih-Hsien Chen
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Publication number: 20210217906Abstract: A method for forming semiconductor devices includes providing a substrate with a conductive pad formed thereon; forming a transparent structure over the substrate, wherein the transparent structure includes a plurality of collimating pillars adjacent to the conductive pad; forming a light-shielding structure over the plurality of collimating pillars and the conductive pad; performing a cutting process to remove one or more materials directly above the conductive pad, while leaving remaining material to cover the conductive pad, wherein the material includes a portion of the light-shielding structure; and performing an etching process to remove the remaining material to expose the conductive pad.Type: ApplicationFiled: January 9, 2020Publication date: July 15, 2021Applicant: Vanguard International Semiconductor CorporationInventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Chih-Hsien CHEN
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Patent number: 10971355Abstract: A substrate includes a ceramic core, a first adhesion layer, a barrier layer, and a second adhesion layer. The first adhesion layer encapsulates the ceramic core and includes silicon oxynitride, wherein the atomic number ratio of oxygen to nitrogen in silicon oxynitride of the first adhesion layer has a first ratio. The barrier layer encapsulates the first adhesion layer and includes silicon oxynitride, wherein the atomic number ratio of oxygen to nitrogen in silicon oxynitride of the barrier layer has a second ratio that is different from the first ratio. The second adhesion layer encapsulates the barrier layer and includes silicon oxynitride, wherein the atomic number ratio of oxygen to nitrogen in silicon oxynitride of the second adhesion layer has a third ratio that is different from the second ratio.Type: GrantFiled: November 21, 2019Date of Patent: April 6, 2021Assignee: Vanguard International Semiconductor CorporationInventors: Kwang-Ming Lin, Yung-Fong Lin
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Patent number: 10935805Abstract: An optical sensor includes a plurality of pixels disposed in a substrate and a light collimating layer. The light collimating layer is disposed on the substrate. The light collimating layer includes a light-shielding layer, a plurality of transparent pillars, and a plurality of first dummy transparent pillars. The light-shielding layer is disposed on the substrate. The plurality of transparent pillars pass through the light-shielding layer and are disposed correspondingly on the plurality of pixels. The plurality of first dummy transparent pillars that pass through the light-shielding layer are disposed on a first peripheral region of the light collimating layer, wherein the plurality of first dummy transparent pillars surround the plurality of transparent pillars from a top view.Type: GrantFiled: January 31, 2019Date of Patent: March 2, 2021Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
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Publication number: 20200350410Abstract: A substrate includes a ceramic core, a first adhesion layer, a barrier layer, and a second adhesion layer. The first adhesion layer encapsulates the ceramic core and includes silicon oxynitride, wherein the atomic number ratio of oxygen to nitrogen in silicon oxynitride of the first adhesion layer has a first ratio. The barrier layer encapsulates the first adhesion layer and includes silicon oxynitride, wherein the atomic number ratio of oxygen to nitrogen in silicon oxynitride of the barrier layer has a second ratio that is different from the first ratio. The second adhesion layer encapsulates the barrier layer and includes silicon oxynitride, wherein the atomic number ratio of oxygen to nitrogen in silicon oxynitride of the second adhesion layer has a third ratio that is different from the second ratio.Type: ApplicationFiled: November 21, 2019Publication date: November 5, 2020Applicant: Vanguard International Semiconductor CorporationInventors: Kwang-Ming LIN, Yung-Fong LIN
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Patent number: 10770602Abstract: An optical sensor includes pixels disposed in a substrate and a light collimating layer disposed on the substrate. The light collimating layer includes a first light-shielding layer, first transparent pillars, a second light-shielding layer, and second transparent pillars. The first light-shielding layer is disposed on the substrate. The first transparent pillars through the first light-shielding layer are correspondingly disposed on the pixels. The second light-shielding layer is disposed on the first light-shielding layer and the first transparent pillars. The second transparent pillars through the second light-shielding layer are correspondingly disposed on the first transparent pillars. The top surface area of each of the first transparent pillars is not equal to the bottom surface area of each of the second transparent pillars.Type: GrantFiled: February 20, 2019Date of Patent: September 8, 2020Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
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Patent number: 10763288Abstract: A semiconductor device is provided. The semiconductor device includes a substrate. The substrate includes a plurality of pixels. The semiconductor device also includes a light collimator layer disposed on the substrate. The light collimator layer includes a transparent connection feature disposed on the substrate, and a plurality of transparent pillars disposed on the transparent connection feature. The plurality of transparent pillars cover the plurality of pixels, and the transparent connection feature connects to the plurality of transparent pillars. The plurality of transparent pillars and the transparent connection feature are made of a first material which includes a transparent material. The light collimator layer also includes a plurality of first light-shielding features disposed on the transparent connection feature. The top surface of one of the transparent pillars is level with the top surface of one of the first light-shielding features.Type: GrantFiled: February 15, 2019Date of Patent: September 1, 2020Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
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Publication number: 20200266226Abstract: A semiconductor device is provided. The semiconductor device includes a substrate. The substrate includes a plurality of pixels. The semiconductor device also includes a light collimator layer disposed on the substrate. The light collimator layer includes a transparent connection feature disposed on the substrate, and a plurality of transparent pillars disposed on the transparent connection feature. The plurality of transparent pillars cover the plurality of pixels, and the transparent connection feature connects to the plurality of transparent pillars. The plurality of transparent pillars and the transparent connection feature are made of a first material which includes a transparent material. The light collimator layer also includes a plurality of first light-shielding features disposed on the transparent connection feature. The top surface of one of the transparent pillars is level with the top surface of one of the first light-shielding features.Type: ApplicationFiled: February 15, 2019Publication date: August 20, 2020Applicant: Vanguard International Semiconductor CorporationInventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
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Publication number: 20200266305Abstract: An optical sensor includes pixels disposed in a substrate and a light collimating layer disposed on the substrate. The light collimating layer includes a first light-shielding layer, first transparent pillars, a second light-shielding layer, and second transparent pillars. The first light-shielding layer is disposed on the substrate. The first transparent pillars through the first light-shielding layer are correspondingly disposed on the pixels. The second light-shielding layer is disposed on the first light-shielding layer and the first transparent pillars. The second transparent pillars through the second light-shielding layer are correspondingly disposed on the first transparent pillars. The top surface area of each of the first transparent pillars is not equal to the bottom surface area of each of the second transparent pillars.Type: ApplicationFiled: February 20, 2019Publication date: August 20, 2020Applicant: Vanguard International Semiconductor CorporationInventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
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Publication number: 20200249490Abstract: An optical sensor includes a plurality of pixels disposed in a substrate and a light collimating layer. The light collimating layer is disposed on the substrate. The light collimating layer includes a light-shielding layer, a plurality of transparent pillars, and a plurality of first dummy transparent pillars. The light-shielding layer is disposed on the substrate. The plurality of transparent pillars pass through the light-shielding layer and are disposed correspondingly on the plurality of pixels. The plurality of first dummy transparent pillars that pass through the light-shielding layer are disposed on a first peripheral region of the light collimating layer, wherein the plurality of first dummy transparent pillars surround the plurality of transparent pillars from a top view.Type: ApplicationFiled: January 31, 2019Publication date: August 6, 2020Applicant: Vanguard International Semiconductor CorporationInventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
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Publication number: 20200251506Abstract: An optical sensor includes pixels disposed in a substrate. A light collimating layer is disposed on the substrate and includes a transparent layer, a light-shielding layer, and transparent pillars. The transparent layer blanketly disposed on the substrate covers the pixels and the region between the pixels. The light-shielding layer is disposed on the transparent layer and between the transparent pillars. The transparent pillars penetrating through the light-shielding layer are correspondingly disposed on the pixels.Type: ApplicationFiled: February 1, 2019Publication date: August 6, 2020Applicant: Vanguard International Semiconductor CorporationInventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
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Patent number: 9443943Abstract: The invention provides a semiconductor device. A buried layer is formed in a substrate. A first deep trench contact structure is formed in the substrate. The first deep trench contact structure comprises a conductor and a liner layer formed on a sidewall of the conductor. A bottom surface of the first deep trench contact structure is in contact with the buried layer.Type: GrantFiled: November 12, 2014Date of Patent: September 13, 2016Assignee: Vanguard International Semiconductor CorporationInventors: Geeng-Lih Lin, Kwang-Ming Lin, Shang-Hui Tu, Jui-Chun Chang
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Patent number: 9385260Abstract: A method for forming thin film solar cell materials introducing a first inert gas mixture that includes hydrogen selenide into a chamber at a first pressure value until the chamber reaches a second pressure value and at a first temperature value, wherein the second pressure value is a predefined percentage of the first pressure value. The temperature in the chamber is increased to a second temperature value for a selenization process so that the pressure in the chamber increases to a third pressure value. Residual gas that is generated during the selenization process can be removed from the chamber. A second inert gas mixture that includes hydrogen sulfide is added into the chamber until the chamber reaches a fourth pressure value. The temperature in the chamber is increased to a third temperature value for a sulfurization process. The chamber is cooled after the sulfurization process.Type: GrantFiled: July 10, 2013Date of Patent: July 5, 2016Assignee: TSMC Solar Ltd.Inventors: Kwang-Ming Lin, Chi-Wei Liu, Wen-Cheng Kuo