Abstract: Provided is an apparatus for controlling lighting brightness including a light control unit that generates a control signal for controlling the brightness of a plurality of lightings; a digital signal generating unit that converts a signal corresponding to the control signal at each period so as to generate non-periodic digital signals; and a driving voltage generating unit that generate driving voltages by converting the digital signals into analog signals.

Abstract: There is provided a lighting control apparatus using digital sigma-delta modulation, the apparatus including: a control part supplying a brightness control signal; a sigma-delta modulation part generating a carry signal according to the brightness control signal of the control part and a predetermined threshold signal by using a sigma-delta modulation method; and a lighting driving part generating a driving current according to the carry signal of the sigma-delta modulation part and supplying the generated driving current to a lighting part.

Abstract: There are provided a system on chip (SoC) with a low power mode and a method of driving the SoC, the SoC including: a power part supplying a main clock signal and controlling analog and digital power supply at a normal mode and supplying a sub clock signal and turning analog power off at a low power mode; a radio frequency (RF) part generating the main clock signal at the normal mode and stopping operation at the low power mode, under the control of the power part; and a control part operating according to the main clock signal at the normal mode and operating according to the sub clock signal, under to the control of the power part.

Abstract: A direct sequence spread spectrum (DSSS) transceiver including a DSSS transmitter and a DSSS receiver, wherein the DSSS transmitter includes: an integral code mapping unit mapping source bit data in one of 2N (N is a natural number) of predetermined symbols by N bits and mapping the symbol in one of integral code words that are obtained by previously integrating each of 2N of bi-orthogonal code words; and a radio frequency (RF) transmitting unit transmitting the integral code words mapped by the integral code mapping unit over an RF carrier wave, and the DSSS receiver includes: an RF receiving unit removing an RF carrier wave from an RF signal from the RF transmitting unit and converting an analog signal obtained by removing the RF carrier wave from the RF signal into a digital signal; a differential circuit unit differentiating and converting the digital signal from the RF receiving unit into bi-orthogonal code words; and a symbol detection unit detecting a symbol corresponding to a maximum value of correlat

Abstract: The invention relates to a receiver having a digital timing recovery function. The receiver of the invention detects frequency offset of a received signal by using symbol correlation between the received signal and a reference signal, and increases/decreases the number of data samples according to the detected frequency offset, thereby recovering symbol timing of the received signal.

Abstract: There is provided an RC oscillation circuit capable of adjusting an oscillation frequency, and an oscillation method thereof. The RC oscillation circuit including: an RC oscillator including a variable resistor and a variable capacitor, the RC oscillator generating an RC oscillating signal having a frequency determined by a resistance of the variable resistor and a capacitance of the variable capacitor; a counter counting a clock number of a reference oscillating signal corresponding to one period of the RC oscillating signal to generate a first count value, the reference oscillating signal having a preset frequency; and a frequency controller controlling a frequency of the RC oscillating signal by determining the resistance of the variable resistor and the capacitance of the variable capacitor such that a difference between the first count value and a preset second count value is smaller than a preset first critical value.

Abstract: Provided is a synchronization device for wireless communication packets, the synchronization device including an A/D (analog/digital) converter that converts an analog input signal applied from outside into a digital signal; a correlation calculating section that is connected to the A/D converter and correlates the converted input signal with a preset reference code so as to calculate a correlation value; a threshold setting section that is connected to the correlation calculating section and sets a threshold value of the correlation value; a maximum correlation detecting section that is connected to the correlation calculating section and the threshold setting section, compares the correlation value with the threshold value, detects the position of the maximum correlation value within each symbol of the input signal when the correlation value is larger than the threshold value, and judges whether a difference in position between the maximum correlation values of consecutive symbols is equal to the period of

Abstract: The present invention relates to a multiple differential demodulator using a weighting value. The multiple differential demodulator according to the present invention includes a weighting value generator for integrating a real part and an imaginary part of a value acquired by multiplying one of a plurality of differentiated reception signals by a conjugated value of a differentiated PN code signal corresponding to a preset symbol, and determining the greater of the integrated real and integrated imaginary parts to apply a predetermined weighting value to the greater value, where the PN code signal is differentiated in the same fashion as the differentiated reception signals.

Abstract: The invention relates to a symbol detector for detecting symbols received in a receive modem of short-range wireless personal area network of a ZigBee system (IEEE 802.15.4). An OQPSK short-range wireless communication system according to the invention acquires frequency offset in a received signal using a symbol contained in a preamble of a packet of the signal, multi-delay-differentiates the signal by a plurality of predetermined delay times, and complex-conjugates the acquired frequency offset to eliminate the frequency offset. Then, the OQPSK short-range wireless communication system according to the invention correlates the received signal with a PN sequence delay-differentiated through the same process to detect the symbols corresponding to the received signal.