Patents by Inventor Kwang-Sun Lee
Kwang-Sun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240176738Abstract: The present technology relates to an electronic device. According to the present technology, a storage device having an improved operation speed may include a nonvolatile memory device, a main memory configured to temporarily store data related to controlling the nonvolatile memory device, and a memory controller configured to control the nonvolatile memory device and the main memory under control of an external host. The main memory may aggregate and process a number of write transactions having continuous addresses, among write transactions received from the memory controller, equal to a burst length unit of the main memory.Type: ApplicationFiled: January 4, 2024Publication date: May 30, 2024Inventors: Do Hun KIM, Kwang Sun LEE, Gi Jo JEONG
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Publication number: 20240170812Abstract: A secondary battery includes: an electrode assembly including a first electrode tab protruding from one side thereof and a second electrode tab protruding from another side thereof; a case accommodating the electrode assembly; a first cap assembly including a first cap plate coupled to one side of the case, a first electrode terminal extending through the first cap plate, and a gasket between the first cap plate and the first electrode terminal; a first current collector plate including a tab connecting part and a terminal connector part protruding from the tab connecting part, the tab connecting part being electrically connected to the first electrode tab, the terminal connector part being electrically connected to the first electrode terminal; and a support member between the first cap plate and the first current collector plate.Type: ApplicationFiled: July 11, 2023Publication date: May 23, 2024Inventors: Jun Hyung LEE, Jun Sun YONG, Kwang Soo BAE
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Publication number: 20240150331Abstract: The present invention relates to a pidolate salt and malate salt of a compound represented by a formula 1 with an excellent liquid-phase stability, solid-phase stability, water solubility, precipitation stability and hygroscopicity all together as a compound for preventing and treating diseases mediated by an acid pump antagonistic activity, as well as a method for preparing the same.Type: ApplicationFiled: January 16, 2024Publication date: May 9, 2024Applicant: HK INNO.N CORPORATIONInventors: Eun Sun KIM, Min Kyoung LEE, Sung Ah LEE, Kwang Do CHOI, Jae Sun KIM, Hyung Chul YOO
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Publication number: 20240154256Abstract: A secondary battery includes: an electrode assembly including a first electrode tab and a second electrode tab exposed at opposite sides of the electrode assembly; a case accommodating the electrode assembly and having a side-opening at opposite sides thereof; a first cap plate sealing a one side-opening in the case; a first terminal electrically connected to the first electrode tab, exposed to the outside of the first cap plate, and having a first protrusion that protrudes outwardly; a second cap plate sealing the other side-opening in the case; and a second terminal electrically connected to the second electrode tab, exposed to the outside of the second cap plate, and having a second protrusion that protrudes outwardly. A battery module includes secondary batteries having outer surfaces of the first terminal of one secondary battery and the second terminal of another secondary battery welded to each other.Type: ApplicationFiled: July 10, 2023Publication date: May 9, 2024Inventors: Kwang Soo BAE, Jun Sun YONG, Jun Hyung LEE, Jung Soo KIM
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Publication number: 20240106085Abstract: A secondary battery includes: an electrode assembly including a first electrode plate from which a first current collecting tab protrudes, a second electrode plate from which a second current collecting tab protrudes, and a separator between the first electrode plate and the second electrode plate; a case accommodating the electrode assembly; and a current collector plate electrically connected to the first current collecting tab and including protrusions, and the first current collecting tab is vertically coupled to the current collector plate and includes coupling grooves to which the protrusions are coupled.Type: ApplicationFiled: August 30, 2023Publication date: March 28, 2024Inventors: Kwang Soo BAE, Jun Sun YONG, Jun Hyung LEE
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Patent number: 11934309Abstract: The present technology relates to an electronic device. According to the present technology, a storage device having an improved operation speed may include a nonvolatile memory device, a main memory configured to temporarily store data related to controlling the nonvolatile memory device, and a memory controller configured to control the nonvolatile memory device and the main memory under control of an external host. The main memory may aggregate and process a number of write transactions having continuous addresses, among write transactions received from the memory controller, equal to a burst length unit of the main memory.Type: GrantFiled: May 11, 2022Date of Patent: March 19, 2024Assignee: SK hynix Inc.Inventors: Do Hun Kim, Kwang Sun Lee, Gi Jo Jeong
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Publication number: 20240086603Abstract: A method of reinforcement learning of a neural network device for generating a verification vector for verifying a circuit design comprising a circuit block includes inputting a test vector to the circuit block, generating one or more rewards based on a coverage corresponding to the test vector, the coverage being determined based on a state transition of the circuit block based on the test vector, and applying the one or more rewards to a reinforcement learning.Type: ApplicationFiled: November 16, 2023Publication date: March 14, 2024Applicant: SAMSUNG ELECTRONICS CO, LTD.Inventors: In HUH, Jeong-hoon KO, Hyo-jin CHOI, Seung-ju KIM, Chang-wook JEONG, Joon-wan CHAI, Kwang-II PARK, Youn-sik PARK, Hyun-sun PARK, Young-min OH, Jun-haeng LEE, Tae-ho LEE
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Patent number: 11925969Abstract: An orthodontic wire bending device includes a providing part, a bending unit and a cutting part. The providing part is configured to provide a wire. The bending unit is disposed at a front side of the providing part, and includes a fixing part and a bending part. The fixing part is configured to fix the wire. The bending part is configured to bend the wire fixed by the fixing part. The cutting part is configured to cut the wire bent by the bending part. The bending part includes a bending module, and the bending module is rotated along a circumferential direction or moves along a direction to make contact with at least one side of the wire for bending the wire.Type: GrantFiled: June 3, 2019Date of Patent: March 12, 2024Assignee: KOREA INSTITUTE OF MACHINERY & MATERIALSInventors: Joonyub Song, Yongjin Kim, Youn Ho Jung, Kwang Sun Choi, Jae-hak Lee, Seung Man Kim
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Publication number: 20240078034Abstract: A memory system is provided and includes memory chips in each of which a first state output pin is arranged and a memory controller in which a first state input pin connected to a first channel including first ways respectively connected to the first state output pins arranged in the memory chips is arranged. The memory controller checks a first internal state of each of the memory chips, based on one or more of a chip enable signal and a CE reduction command of the memory chips, and a second signal received through the first state input pin as a result of an AND operation of first signals output through the first state output pins, during a state check interval for checking respective states of the memory chips.Type: ApplicationFiled: November 10, 2023Publication date: March 7, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seong-hoon WOO, Hak-sun KIM, Kwang-Jin LEE, Su-chang JEON
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Patent number: 11912690Abstract: The present invention relates to a pidolate salt and malate salt of a compound represented by a formula 1 with an excellent liquid-phase stability, solid-phase stability, water solubility, precipitation stability and hygroscopicity all together as a compound for preventing and treating diseases mediated by an acid pump antagonistic activity, as well as a method for preparing the same.Type: GrantFiled: November 21, 2022Date of Patent: February 27, 2024Assignee: HK INNO.N CORPORATIONInventors: Eun Sun Kim, Min Kyoung Lee, Sung Ah Lee, Kwang Do Choi, Jae Sun Kim, Hyung Chul Yoo
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Patent number: 11915652Abstract: A display includes a plurality of pixels in a non-quadrangular display area and a plurality of first driving circuits and a plurality of second driving circuits in a peripheral area of the display area. Each of the pixels is connected to a first signal line in a first direction and a second signal line in a second direction crossing the first direction. Each of the first driving circuits outputs a first signal to the first signal line of a corresponding one of the pixels. Each of the second driving circuits outputs a second signal to the second signal line of a corresponding one of the pixels. The number of second driving circuits between neighboring first driving circuits is different depending on a position in the peripheral area.Type: GrantFiled: August 9, 2021Date of Patent: February 27, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Seung-Kyu Lee, Kwang-Min Kim, Byoung Sun Kim
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Patent number: 11875184Abstract: A method for translating memory addresses in a manycore system is provided, which is executed by one or more processors, and includes receiving identification information of a thread accessing a memory associated with one or more cores of a cluster that includes a plurality of cores, receiving a virtual address of data accessed by the thread, and determining a physical address of data in the memory based on the virtual address and the identification information of the thread.Type: GrantFiled: September 26, 2023Date of Patent: January 16, 2024Assignee: MetisX CO., Ltd.Inventors: Ju Hyun Kim, Jae Wan Yeon, Kwang Sun Lee
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Patent number: 11755476Abstract: A memory controller includes a buffer memory configured to store first meta data and second meta data having a different type from the first meta data, and a cache memory including first and second dedicated areas. The first meta data is cached in the first dedicated area and the second meta data is cached in the second dedicated area.Type: GrantFiled: March 9, 2021Date of Patent: September 12, 2023Assignee: SK hynix Inc.Inventors: Gi Jo Jeong, Do Hun Kim, Kwang Sun Lee
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Patent number: 11675537Abstract: A controller for controlling a memory device is provided to include: a request receiver configured to receive a request including a logical address from a host; a dependency checker configured to acquire the request from the request receiver and check a dependency of the request; a map manager configured to generate a command including a physical address mapped to the logical address of the request in response to a result of checking that the request has no dependency on the prior incomplete request; and a command submitter configured to provide the memory device with the command generated by the map manager, wherein the request receiver, the dependency checker, the map manager and the command submitter are structured to configure a data pipeline such that operations of the request receiver, the dependency checker, the map manager, and the command submitter deliver are performed in series.Type: GrantFiled: April 9, 2021Date of Patent: June 13, 2023Assignee: SK hynix Inc.Inventors: Ju Hyun Kim, Do Hun Kim, Jin Yeong Kim, Kee Bum Shin, Jae Wan Yeon, Kwang Sun Lee
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Patent number: 11449235Abstract: The present technology relates to an electronic device. According to the present technology, a storage device having an improved operation speed may include a nonvolatile memory device, a main memory configured to temporarily store data related to controlling the nonvolatile memory device, and a memory controller configured to control the nonvolatile memory device and the main memory under control of an external host. The main memory may aggregate and process a number of write transactions having continuous addresses, among write transactions received from the memory controller, equal to a burst length unit of the main memory.Type: GrantFiled: August 12, 2020Date of Patent: September 20, 2022Assignee: SK hynix Inc.Inventors: Do Hun Kim, Kwang Sun Lee
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Publication number: 20220269605Abstract: The present technology relates to an electronic device. According to the present technology, a storage device having an improved operation speed may include a nonvolatile memory device, a main memory configured to temporarily store data related to controlling the nonvolatile memory device, and a memory controller configured to control the nonvolatile memory device and the main memory under control of an external host. The main memory may aggregate and process a number of write transactions having continuous addresses, among write transactions received from the memory controller, equal to a burst length unit of the main memory.Type: ApplicationFiled: May 11, 2022Publication date: August 25, 2022Inventors: Do Hun KIM, Kwang Sun LEE, Gi Jo JEONG
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Patent number: 11402997Abstract: The present technology relates to an electronic device. According to the present technology, a storage device having an improved operation speed may include a nonvolatile memory device, a main memory configured to temporarily store data related to controlling the nonvolatile memory device, and a memory controller configured to control the nonvolatile memory device and the main memory under control of an external host. The main memory may aggregate and process a number of write transactions having continuous addresses, among write transactions received from the memory controller, equal to a burst length unit of the main memory.Type: GrantFiled: August 12, 2020Date of Patent: August 2, 2022Assignee: SK hynix Inc.Inventors: Do Hun Kim, Kwang Sun Lee
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Patent number: 11355210Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. According to the embodiments of the present disclosure, the memory system may store target data to be programmed in a memory device in a first memory, selectively store the target data in a second memory, program the target data stored in the first memory into the memory device, and reprogram the target data stored in the first memory or the second memory into the memory device when the programming of the target data stored in the first memory into the memory device fails. The buffer circuit may input the target data input from the memory controller into the second memory or discard the target data.Type: GrantFiled: February 4, 2021Date of Patent: June 7, 2022Assignee: SK hynix Inc.Inventors: Do Hun Kim, Kwang Sun Lee, Ju Hyun Kim, Jin Yeong Kim
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Patent number: 11347400Abstract: The present technology relates to an electronic device. According to the present technology, a storage device having an improved operation speed may include a nonvolatile memory device, a main memory configured to temporarily store data related to controlling the nonvolatile memory device, and a memory controller configured to control the nonvolatile memory device and the main memory under control of an external host. The main memory may aggregate and process a number of write transactions having continuous addresses, among write transactions received from the memory controller, equal to a burst length unit of the main memory.Type: GrantFiled: August 12, 2020Date of Patent: May 31, 2022Assignee: SK hynix Inc.Inventors: Do Hun Kim, Kwang Sun Lee
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Publication number: 20220156002Abstract: A controller for controlling a memory device is provided to include: a request receiver configured to receive a request including a logical address from a host; a dependency checker configured to acquire the request from the request receiver and check a dependency of the request; a map manager configured to generate a command including a physical address mapped to the logical address of the request in response to a result of checking that the request has no dependency on the prior incomplete request; and a command submitter configured to provide the memory device with the command generated by the map manager, wherein the request receiver, the dependency checker, the map manager and the command submitter are structured to configure a data pipeline such that operations of the request receiver, the dependency checker, the map manager, and the command submitter deliver are performed in series.Type: ApplicationFiled: April 9, 2021Publication date: May 19, 2022Inventors: Ju Hyun KIM, Do Hun KIM, Jin Yeong KIM, Kee Bum SHIN, Jae Wan YEON, Kwang Sun LEE