Patents by Inventor Kwang Won Koh

Kwang Won Koh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11947463
    Abstract: Disclosed herein is an apparatus for managing disaggregated memory, which is located in a virtual machine in a physical node. The apparatus is configured to select, depending on the proportion of valid pages, direct transfer between remote memory units or indirect transfer via local memory for each of the memory pages of the source remote memory to be migrated, among at least one remote memory unit used by the virtual machine, to transfer the memory pages of the source remote memory to target remote memory based on the direct transfer or the indirect transfer, and to release the source remote memory.
    Type: Grant
    Filed: January 24, 2023
    Date of Patent: April 2, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Won Koh, Chang-Dae Kim, Kang-Ho Kim
  • Patent number: 11849005
    Abstract: Disclosed herein are a method and apparatus for accelerating network transmission in a memory-disaggregated environment. The method for accelerating network transmission in a memory-disaggregated environment includes copying transmission data to a transmission buffer of the computing node, when a page fault occurs during copy of the transmission data, identifying a location at which the transmission data is stored, setting a node in which a largest amount of transmission data is stored as a transmission node, and sending a transmission command to the transmission node.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: December 19, 2023
    Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, SYSGEAR CO., LTD.
    Inventors: Kwang-Won Koh, Kang-Ho Kim, Chang-Dae Kim, Tae-Hoon Kim, Sang-Ho Eom
  • Publication number: 20230305964
    Abstract: Disclosed herein are a method and apparatus for verifying integrity in a memory-disaggregated environment. The method for verifying integrity in a memory-disaggregated environment includes receiving write data and multiple hash values generated based on write data from a remote memory, and verifying integrity of the write data based on the write data and the hash values, wherein verifying the integrity of the write data comprises selecting a hash value for the integrity verification based on an access latency of the remote memory.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 28, 2023
    Applicants: Electronics and Telecommunications Research Institute, SYSGEAR CO., LTD.
    Inventors: Tae-Hoon KIM, Kwang-Won KOH, Kang-Ho KIM, Chang-Dae KIM, Sang-Ho EOM
  • Publication number: 20230305721
    Abstract: Disclosed herein is a method for memory management in a memory disaggregation environment. The method includes generating virtual memory based on multiple first memory devices, determining whether a condition for allocation acceleration is satisfied by the first memory devices, and allocating a memory page to the first memory devices based on whether the condition for allocation acceleration is satisfied.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 28, 2023
    Applicants: Electronics and Telecommunications Research Institute, SYSGEAR CO., LTD.
    Inventors: Chang-Dae KIM, Kwang-Won KOH, Kang-Ho KIM, Tae-Hoon KIM, Sang-Ho EOM
  • Publication number: 20230179679
    Abstract: Disclosed herein are a method and apparatus for accelerating network transmission in a memory-disaggregated environment. The method for accelerating network transmission in a memory-disaggregated environment includes copying transmission data to a transmission buffer of the computing node, when a page fault occurs during copy of the transmission data, identifying a location at which the transmission data is stored, setting a node in which a largest amount of transmission data is stored as a transmission node, and sending a transmission command to the transmission node.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 8, 2023
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, SYSGEAR CO., LTD.
    Inventors: Kwang-Won KOH, Kang-Ho KIM, Chang-Dae KIM, Tae-Hoon KIM, Sang-Ho EOM
  • Publication number: 20230176893
    Abstract: Disclosed herein are a method and apparatus for migrating a virtual machine in a memory-disaggregated environment. The method for migrating a virtual machine in a memory-disaggregated environment includes determining whether to migrate a virtual machine based on a number of accesses to a remote memory, establishing a migration policy for the virtual machine based on a remote memory access pattern, and determining a migration destination node based on the migration policy, wherein the migration policy includes a first migration policy corresponding to a case where the remote memory access pattern is sequential, and a second migration policy corresponding to a case where the remote memory access pattern is non-sequential.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 8, 2023
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, SYSGEAR CO., LTD.
    Inventors: Kwang-Won KOH, Kang-Ho KIM, Chang-Dae KIM, Tae-Hoon KIM, Sang-Ho EOM
  • Patent number: 11586549
    Abstract: Disclosed herein is an apparatus for managing disaggregated memory, which is located in a virtual machine in a physical node. The apparatus is configured to select, depending on the proportion of valid pages, direct transfer between remote memory units or indirect transfer via local memory for each of the memory pages of the source remote memory to be migrated, among at least one remote memory unit used by the virtual machine, to transfer the memory pages of the source remote memory to target remote memory based on the direct transfer or the indirect transfer, and to release the source remote memory.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: February 21, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Won Koh, Chang-Dae Kim, Kang-Ho Kim
  • Publication number: 20220392578
    Abstract: Disclosed herein are an apparatus and method for accelerating genome sequence alignment. The method may include loading an essential index for a reference genome into memory, loading an additional index corresponding to the amount of available memory into memory, reading a target nucleotide sequence for which genome sequence alignment is to be performed, checking whether an exact match of the target nucleotide sequence is present in the reference genome based on the additional index, and generating a result of alignment of the target nucleotide sequence using the location of the exact match of the target nucleotide sequence in the reference genome when an exact match is found.
    Type: Application
    Filed: June 3, 2022
    Publication date: December 8, 2022
    Inventors: Chang-Dae KIM, Kwang-Won KOH, Kang-Ho KIM, Tae-Hoon KIM
  • Publication number: 20220365712
    Abstract: A memory access method and device are provided. A memory access method may include: identifying, when an access to a page of a remote memory occurs, a type of the access; allocating a sparse buffer when the access is a sparse write; storing data for the sparse write in the sparse buffer; storing an address for the sparse write as a key and the sparse buffer as a value in a buffer table; and updating an instruction pointer to point to a next instruction.
    Type: Application
    Filed: May 10, 2022
    Publication date: November 17, 2022
    Inventors: Kwang-Won KOH, Kang Ho KIM, Changdae KIM, Taehoon KIM
  • Patent number: 11500693
    Abstract: Disclosed herein are a distributed system and a method for operating the distributed system. The method for operating a distributed system including a server and multiple clients includes acquiring, by a first client of the multiple clients, a lock on a shared resource using a first table of the server and a second table of the client, and releasing, by the first client, a lock on the shared resource using the first table and the second table, wherein the first table is a lock (DSLock) table for storing information about a distributed shared resource, and the second table is a data structure (DSLock_node) table for a lock request.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: November 15, 2022
    Assignee: Electronics and telecommunications research institute
    Inventors: Kang-Ho Kim, Kwang-Won Koh, Hong-Yeon Kim, Baik-Song An, Sang-Min Lee
  • Publication number: 20220300331
    Abstract: An apparatus for memory integrated management in a cluster system including a plurality of physical nodes connected to each other by a network determines one of the plurality of physical nodes as a node to place a new virtual machine, allocates the first type of memory allocated to the one physical node to the new virtual machine as much as the memory capacity required by the new virtual machine, and distributes the second type of memory to a plurality of virtual machines running on the plurality of physical nodes by integrating and managing the second type of memory allocated to each of the plurality of physical nodes. In this case, the access speed of the second type of memory is faster than that of the first type of memory.
    Type: Application
    Filed: November 2, 2021
    Publication date: September 22, 2022
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Changdae KIM, Kwang-Won KOH, Kang Ho KIM, Taehoon KIM
  • Publication number: 20220197764
    Abstract: Disclosed is a quantum diagnostic circuit, which includes an input unit having an input of at least first to fourth qubits, a diagnostic circuit unit receiving the first to fourth qubits from the input unit and providing a quantum superposition and a quantum entanglement, and an output unit receiving an output of the diagnostic circuit unit and determining whether the output is in a Bell-state, and the diagnostic circuit unit includes a Hadamard gate processing the first qubit to provide the quantum superposition of the first to fourth qubits, a first CNOT gate providing the quantum entanglement between an output of the Hadamard gate and the second qubit, a second CNOT gate providing the quantum entanglement between an output of the first CNOT gate and the third qubit, and a third CNOT gate providing the quantum entanglement between an output of the second CNOT gate and the fourth qubit.
    Type: Application
    Filed: December 3, 2021
    Publication date: June 23, 2022
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: SUNGIK JUN, Kwang-Won KOH, Kang Ho KIM, Changdae KIM, Taehoon KIM
  • Publication number: 20210390056
    Abstract: Disclosed herein is an apparatus for managing disaggregated memory, which is located in a virtual machine in a physical node. The apparatus is configured to select, depending on the proportion of valid pages, direct transfer between remote memory units or indirect transfer via local memory for each of the memory pages of the source remote memory to be migrated, among at least one remote memory unit used by the virtual machine, to transfer the memory pages of the source remote memory to target remote memory based on the direct transfer or the indirect transfer, and to release the source remote memory.
    Type: Application
    Filed: May 19, 2021
    Publication date: December 16, 2021
    Inventors: Kwang-Won KOH, Chang-Dae KIM, Kang-Ho KIM
  • Publication number: 20210287760
    Abstract: An apparatus for genome sequence alignment attempts a search for the hash tables to align a target nucleotide sequence, from a hash table having a large seed size to a hash table having a small seed size, and when there is at least one matched seed to the target nucleotide sequence on a hash table, aligns the target nucleotide sequence by using candidate positions from the hash table without further hash table searching.
    Type: Application
    Filed: October 14, 2020
    Publication date: September 16, 2021
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Changdae KIM, Kwang-Won KOH, Kang Ho KIM
  • Publication number: 20200319939
    Abstract: Disclosed herein are a distributed system and a method for operating the distributed system. The method for operating a distributed system including a server and multiple clients includes acquiring, by a first client of the multiple clients, a lock on a shared resource using a first table of the server and a second table of the client, and releasing, by the first client, a lock on the shared resource using the first table and the second table, wherein the first table is a lock (DSLock) table for storing information about a distributed shared resource, and the second table is a data structure (DSLock node) table for a lock request.
    Type: Application
    Filed: March 31, 2020
    Publication date: October 8, 2020
    Inventors: Kang-Ho KIM, Kwang-Won KOH, Hong-Yeon KIM, Baik-Song AN, Sang-Min LEE
  • Patent number: 10789090
    Abstract: The preset specification provides a method of managing a disaggregated memory in a virtual system. Herein, the disaggregated memory managing method includes: detecting a memory access pattern in a virtual machine node based on an operation of a virtual machine; and performing a memory operation by using a memory block in consideration of the memory access pattern, wherein the memory access pattern is variably set based on a time at which the operation of the virtual machine is performed, and the memory block dynamically changes in size based on the memory access pattern.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: September 29, 2020
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang Won Koh, Kang Ho Kim
  • Patent number: 10754547
    Abstract: Disclosed is a method of managing a disaggregated memory. According to the present disclosure, the method includes: assigning at least one memory page to a local memory and a remote memory; checking a request for access to the memory page; checking whether a target performance ratio required in service is satisfied or not when the memory page requested to be accessed is assigned to the remote memory; predicting a size of the local memory on the basis of an LRU distance-based histogram when the target performance ratio is not satisfied; and reassigning the memory page requested to be accessed in consideration of the predicted size of the local memory.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: August 25, 2020
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kang Ho Kim, Kwang Won Koh
  • Patent number: 10296379
    Abstract: Scheduling threads in a system with many cores includes generating a thread map where a connection relationship between a plurality of threads is represented by a frequency of inter-process communication (IPC) between threads, generating a core map where a connection relationship between a plurality of cores is represented by a hop between cores, and respectively allocating the plurality of threads to the plurality of cores defined by the core map, based on a thread allocation policy defining a mapping rule between the thread map and the core map.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: May 21, 2019
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kang Ho Kim, Kwang Won Koh, Jin Mee Kim, Jeong Hwan Lee, Seung Hyub Jeon, Sung In Jung, Yeon Jeong Jeong, Seung Jun Cha
  • Publication number: 20190138341
    Abstract: The preset specification provides a method of managing a disaggregated memory in a virtual system. Herein, the disaggregated memory managing method includes: detecting a memory access pattern in a virtual machine node based on an operation of a virtual machine; and performing a memory operation by using a memory block in consideration of the memory access pattern, wherein the memory access pattern is variably set based on a time at which the operation of the virtual machine is performed, and the memory block dynamically changes in size based on the memory access pattern.
    Type: Application
    Filed: November 9, 2018
    Publication date: May 9, 2019
    Inventors: Kwang Won KOH, Kang Ho KIM
  • Publication number: 20190114079
    Abstract: Disclosed is a method of managing a disaggregated memory. According to the present disclosure, the method includes: assigning at least one memory page to a local memory and a remote memory; checking a request for access to the memory page; checking whether a target performance ratio required in service is satisfied or not when the memory page requested to be accessed is assigned to the remote memory; predicting a size of the local memory on the basis of an LRU distance-based histogram when the target performance ratio is not satisfied; and reassigning the memory page requested to be accessed in consideration of the predicted size of the local memory.
    Type: Application
    Filed: October 16, 2018
    Publication date: April 18, 2019
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kang Ho KIM, Kwang Won KOH