Abstract: Disclosed is a low power consumption word line driver that satisfactorily operates even with the threshold voltage variations. A load FET comprises a depletion FET (J5) and enhancement FET (J6). The drain, gate and source of the depletion FET are connected in parallel to those of the enhancement FET. An enhancement FET (J7) is provided to charge a word line. The drains of the depletion FET and enhancement FET J5 and J6 are connected to ground voltage, the gates to the series connecting point of the preceding circuit part, and the sources to the drain of the drive FET J7 for output. The source of the drive FET J7 is connected to voltage source.

Abstract: A memory cell for use in a SRAM improving the operating characteristics and capable of high density is described. In the its construction, the data is stored to a cell latch which includes load resistances and driving FETs, and a transmission FET is turned "ON" in case that a word line is selected and simultaneously electrically connects a bit line with the cell latch. A reading FET transmits the memorized contents of the cell latch to the transmission FET during reading operation of the memory cell and a writing FET stores the data of the bit line into the cell latch during writing operation of the memory cell. Thus, the predominant operating characteristics with respect to the threshold voltage variations among device parameters of FET can be obtained, and the breakdown phenomenon of the stored data can be prevented by separating the cell latch and the bit line in the memory cell.