Abstract: A received Direct Sequence Spread Spectrum DSSS signal is processed by performing DSSS acquisition to obtain estimates of a frequency offset and a spreading code phase, sequentially obtaining, for each one of a plurality of segments of a received DSSS signal, a correlation function between the DSSS signal segment and a replica of a spreading code by using a Time and Frequency Transform based correlation method, the estimated frequency and the spreading code phase, and performing DSSS carrier tracking by tracking the phase of a correlation peak in the obtained correlation functions, and applying phase corrections to the obtained correlation functions to provide fine Doppler compensation. The time and frequency transform based correlation method involves, for each segment of the received DSSS signal, obtaining a plurality of samples and transforming the samples from the time domain to the frequency domain.

Abstract: A received Direct Sequence Spread Spectrum DSSS signal is processed by performing DSSS acquisition to obtain estimates of a frequency offset and a spreading code phase, sequentially obtaining, for each one of a plurality of segments of a received DSSS signal, a correlation function between the DSSS signal segment and a replica of a spreading code by using a Time and Frequency Transform based correlation method, the estimated frequency and the spreading code phase, and performing DSSS carrier tracking by tracking the phase of a correlation peak in the obtained correlation functions, and applying phase corrections to the obtained correlation functions to provide fine Doppler compensation. The time and frequency transform based correlation method involves, for each segment of the received DSSS signal, obtaining a plurality of samples and transforming the samples from the time domain to the frequency domain.

Abstract: A technique implements a novel high-speed high-density packet buffer utilizing a combination of high-speed and low-speed memory devices. The novel packet buffer is organized as a plurality of FIFO queues where each FIFO queue is associated with a particular input or output line. Each queue comprises a high-speed cache portion that resides in high-speed memory and a low-speed high-density portion that resides in low-speed high-density memory. The high-speed cache portion contains FIFO data that contains head and/or tail associated with the novel FIFO queue. The low-speed high-density portion contains FIFO data that is not contained in the high-speed cache portion.