Abstract: Methods, systems, and devices for staggered horizontal cell architecture for memory devices are described. Generally, the described techniques provide for a memory device that supports staggered cell architectures and techniques to manufacture the memory device. The memory device may include a stack of materials including alternating layers of dielectric and conductive material. The memory device may include one or more staircase structures coupled with the stack of layers. The memory device may include access lines, such as bit lines, that are staggered according to a pattern, such as a serpentine pattern of dielectric fill surrounding the access lines. The memory device may include a set of repeatable structures that may be interlaced in a staggered configuration. The repeatable structure may include two fins extending in opposite directions and coupled to a respective staircase structure.

Abstract: A method of forming an array comprising using two different composition masking materials in forming a pattern of spaced repeating first features of substantially same size and substantially same shape relative one another. A pattern-interrupting second feature of at least one of different size or different shape compared to that of the first features is within and interrupts the pattern of first features. The pattern of the first features with the pattern-interrupting second feature are translated into lower substrate material that is below the first features and the pattern-interrupting second feature. Material of the first features and of the pattern-interrupting second feature that is above the lower substrate material is removed at least one of during or after the translating.

Abstract: An apparatus includes fin structures comprising individual levels of a conductive material having elongated portions extending in a first horizontal direction, first conductive lines extending in a second horizontal direction transverse to the first horizontal direction, and second conductive lines extending in a vertical direction transverse to each of the first horizontal direction and the second horizontal direction. At least portions of the first conductive lines are aligned vertically. The apparatus also includes horizontal capacitor structures comprising the conductive material of the fin structures and access devices proximate intersections of the first conductive lines and the second conductive lines. The access devices comprise the conductive material of the fin structures. Memory devices, electronic systems, and methods of forming the apparatus are also disclosed.

Abstract: An apparatus includes fin structures comprising individual levels of a conductive material having elongated portions extending in a first horizontal direction, first conductive lines extending in a second horizontal direction transverse to the first horizontal direction, and second conductive lines extending in a vertical direction transverse to each of the first horizontal direction and the second horizontal direction. At least portions of the first conductive lines are aligned vertically. The apparatus also includes horizontal capacitor structures comprising the conductive material of the fin structures and access devices proximate intersections of the first conductive lines and the second conductive lines. The access devices comprise the conductive material of the fin structures. Memory devices, electronic systems, and methods of forming the apparatus are also disclosed.

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

Abstract: A method of forming an array comprising using two different composition masking materials in forming a pattern of spaced repeating first features of substantially same size and substantially same shape relative one another. A pattern-interrupting second feature of at least one of different size or different shape compared to that of the first features is within and interrupts the pattern of first features. The pattern of the first features with the pattern-interrupting second feature are translated into lower substrate material that is below the first features and the pattern-interrupting second feature. Material of the first features and of the pattern-interrupting second feature that is above the lower substrate material is removed at least one of during or after the translating.

Abstract: A method of forming an array comprising using two different composition masking materials in forming a pattern of spaced repeating first features of substantially same size and substantially same shape relative one another. A pattern-interrupting second feature of at least one of different size or different shape compared to that of the first features is within and interrupts the pattern of first features. The pattern of the first features with the pattern-interrupting second feature are translated into lower substrate material that is below the first features and the pattern-interrupting second feature. Material of the first features and of the pattern-interrupting second feature that is above the lower substrate material is removed at least one of during or after the translating.

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

Abstract: A method of forming an array comprising using two different composition masking materials in forming a pattern of spaced repeating first features of substantially same size and substantially same shape relative one another. A pattern-interrupting second feature of at least one of different size or different shape compared to that of the first features is within and interrupts the pattern of first features. The pattern of the first features with the pattern-interrupting second feature are translated into lower substrate material that is below the first features and the pattern-interrupting second feature. Material of the first features and of the pattern-interrupting second feature that is above the lower substrate material is removed at least one of during or after the translating.

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

Abstract: Some embodiments include methods of forming structures. Spaced-apart features are formed which contain temperature-sensitive material. Liners are formed along sidewalls of the features under conditions which do not expose the temperature-sensitive material to a temperature exceeding 300° C. The liners extend along the temperature-sensitive material and narrow gaps between the spaced-apart features. The narrowed gaps are filled with flowable material which is cured under conditions that do not expose the temperature-sensitive material to a temperature exceeding 300° C. In some embodiments, the features contain memory cell regions over select device regions. The memory cell regions include first chalcogenide and the select device regions include second chalcogenide. The liners extend along and directly against the first and second chalcogenides.

Abstract: Some embodiments include methods of forming structures. Spaced-apart features are formed which contain temperature-sensitive material. Liners are formed along sidewalls of the features under conditions which do not expose the temperature-sensitive material to a temperature exceeding 300° C. The liners extend along the temperature-sensitive material and narrow gaps between the spaced-apart features. The narrowed gaps are filled with flowable material which is cured under conditions that do not expose the temperature-sensitive material to a temperature exceeding 300° C. In some embodiments, the features contain memory cell regions over select device regions. The memory cell regions include first chalcogenide and the select device regions include second chalcogenide. The liners extend along and directly against the first and second chalcogenides.

Abstract: Some embodiments include methods of forming structures. Spaced-apart features are formed which contain temperature-sensitive material. Liners are formed along sidewalls of the features under conditions which do not expose the temperature-sensitive material to a temperature exceeding 300° C. The liners extend along the temperature-sensitive material and narrow gaps between the spaced-apart features. The narrowed gaps are filled with flowable material which is cured under conditions that do not expose the temperature-sensitive material to a temperature exceeding 300° C. In some embodiments, the features contain memory cell regions over select device regions. The memory cell regions include first chalcogenide and the select device regions include second chalcogenide. The liners extend along and directly against the first and second chalcogenides.

Abstract: Some embodiments include methods of forming structures. Spaced-apart features are formed which contain temperature-sensitive material. Liners are formed along sidewalls of the features under conditions which do not expose the temperature-sensitive material to a temperature exceeding 300° C. The liners extend along the temperature-sensitive material and narrow gaps between the spaced-apart features. The narrowed gaps are filled with flowable material which is cured under conditions that do not expose the temperature-sensitive material to a temperature exceeding 300° C. In some embodiments, the features contain memory cell regions over select device regions. The memory cell regions include first chalcogenide and the select device regions include second chalcogenide. The liners extend along and directly against the first and second chalcogenides.