Abstract: A production method for a semiconductor device includes providing a semiconductor substrate having semiconductor layer of a first conductivity type formed on a surface thereof; forming a first mask so as to cover a predetermined region of the semiconductor layer; (c) forming a well region of a second conductivity type by implanting impurity ions of the second conductivity type into the semiconductor layer having the first mask formed thereon; reducing the thickness of the first mask by removing a portion of the first mask; forming a second mask covering a portion of the well region by using photolithography; and forming a source region of the first conductivity type by implanting impurity ions of the first conductivity type into the semiconductor layer having the first mask with the reduced thickness and the second mask formed thereon.

Abstract: A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating film formed on a substrate; and a capacitor composed of a lower capacitor electrode made of the first conductive film, a dielectric film formed on the lower capacitor electrode, and an upper capacitor electrode made of the second conductive film and formed on the dielectric film.

Abstract: A production method for a semiconductor device includes the steps of: (a) providing a semiconductor substrate having a semiconductor layer 2 of a first conductivity type formed on a surface thereof; (b) forming a first mask 30 so as to cover a predetermined region of the semiconductor layer 2; (c) forming a well region 6 of a second conductivity type by implanting impurity ions of the second conductivity type into the semiconductor layer 2 having the first mask 30 formed thereon; (d) reducing the thickness t1 of the first mask 30 by removing a portion of the first mask 30; (e) forming a second mask 34 covering a portion of the well region 6 by using photolithography; and (f) forming a source region 8 of the first conductivity type by implanting impurity ions of the first conductivity type into the semiconductor layer 2 having the first mask 30? with the reduced thickness and the second mask 34 formed thereon.

Abstract: A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating film formed on a substrate; and a capacitor composed of a lower capacitor electrode made of the first conductive film, a dielectric film formed on the lower capacitor electrode, and an upper capacitor electrode made of the second conductive film and formed on the dielectric film.

Abstract: A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating film formed on a substrate; and a capacitor composed of a lower capacitor electrode made of the first conductive film, a dielectric film formed on the lower capacitor electrode, and an upper capacitor electrode made of the second conductive film and formed on the dielectric film.

Abstract: A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating film formed on a substrate; and a capacitor composed of a lower capacitor electrode made of the first conductive film, a dielectric film formed on the lower capacitor electrode, and an upper capacitor electrode made of the second conductive film and formed on the dielectric film.

Abstract: A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating film formed on a substrate; and a capacitor composed of a lower capacitor electrode made of the first conductive film, a dielectric film formed on the lower capacitor electrode, and an upper capacitor electrode made of the second conductive film and formed on the dielectric film.

Abstract: After distributing a nonmetal element in a region in the vicinity of a surface portion of a semiconductor layer, a metal film is deposited on the semiconductor layer. Next, a semiconductor-metal compound layer is epitaxially grown in the surface portion of the semiconductor layer by causing a reaction between an element included in the semiconductor layer and a metal included in the metal film through annealing carried out on the metal film.

Abstract: A portable laundry bag formed by providing bag opening and closing members on at least two portions of a bag body, forming the bag opening and closing members by slider-carrying bag opening and closing fasteners having male and female seal hooks, providing at least one of the bag opening and closing fasteners at the side of an opening thereof with male and female slider guide hooks so that the slider guide hooks extend in parallel with the seal hooks, disposing inner-side guides of the sliders so that the inner-side guides are positioned between the seal hooks and slider guide hooks, providing on at least one portion of the bag body with an outflow of laundry preventing member. Thus, the object of the invention is to provide a clean and small-weight portable laundry bag as traveling goods capable of being transported, handled simply, and thrown away after its use.

Abstract: A memory cell transistor and a planar capacitor are provided in a memory region, and both transistors of a CMOS device are provided in a logic circuit region. A capacitance dielectric 15 and a plate electrode 16b of the planar capacitor are provided over a trench shared with a shallow trench isolation 12a, and the upper part of the trench is filled with the capacitance dielectric 15 and the plate electrode 16b. An n-type diffusion layer 19 that is a storage node is formed, with an end region thereof extending along one side of the upper part of the trench, to a region of the substrate overlapping with the shallow trench isolation 12a. The area of a part of the substrate functioning as a capacitor can be increased without increasing the substrate area.

Abstract: A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating film formed on a substrate; and a capacitor composed of a lower capacitor electrode made of the first conductive film, a dielectric film formed on the lower capacitor electrode, and an upper capacitor electrode made of the second conductive film and formed on the dielectric film.

Abstract: A memory cell transistor and a planar capacitor are provided in a memory region, and both transistors of a CMOS device are provided in a logic circuit region. A capacitance dielectric 15 and a plate electrode 16b of the planar capacitor are provided over a trench shared with a shallow trench isolation 12a, and the upper part of the trench is filled with the capacitance dielectric 15 and the plate electrode 16b. An n-type diffusion layer 19 that is a storage node is formed, with an end region thereof extending along one side of the upper part of the trench, to a region of the substrate overlapping with the shallow trench isolation 12a. The area of a part of the substrate functioning as a capacitor can be increased without increasing the substrate area.

Abstract: After a cobalt film is deposited on a silicon-containing film formed on a semiconductor substrate, a first heat treatment at a relatively low temperature is performed with respect to the semiconductor substrate to cause a reaction between the cobalt film and the silicon layer and thereby form a Co2Si layer or CoSi layer in at least a surface portion of the silicon layer. Then, a silicon-containing film is deposited on the Co2Si layer or CoSi layer and a second heat treatment at a relatively high temperature is performed with respect to the semiconductor substrate to cause a reaction between the silicon-containing film and the Co2Si layer or CoSi layer and thereby form a CoSi2 layer in at least a surface portion of the silicon layer.

Abstract: A particular portion of a damaged layer within a semiconductor substrate, which is likely to affect the performance of resulting semiconductor devices, is distinguished from the other negligible portions thereof and the depth of that non-negligible portion is detected. An Si substrate is placed on a stage, and a mercury electrode, which forms a Schottky barrier with the Si substrate, is brought into contact with the surface of the Si substrate. When a constant current is supplied from a constant current source between the mercury electrode and the Si substrate, charges are trapped at the trap centers in the damaged layer within the Si substrate. As a result, a potential on the conduction band rises near the surface of the Si substrate. And if the voltage between the electrode and the substrate is increased along with the potential rise, a constant current flows.

Abstract: A structure of a floating gate type EEPROM capable of implementing micromachining less than submicron and a method for fabricating it are disclosed. Since a silicon oxide film 3 for element isolation is embedded in an P-type Si substrate 1, as compared with the case where the element isolation region is formed on the P-type Si substrate 1, a level difference between the P-type Si substrate 1 and a floating gate electrode 6, control gate electrode 8 and erasing gate electrode 12 can be reduced remarkably. This solves a problem of etching remainder during the dry etching of each electrode. In addition, the depth of focus in lithography can be easily assured. This realizes a floating gate type EEPROM equipped with an erasing gate which is so fine as to be less than submicron.

Abstract: After a cobalt film is deposited on a silicon-containing film formed on a semiconductor substrate, a first heat treatment at a relatively low temperature is performed with respect to the semiconductor substrate to cause a reaction between the cobalt film and the silicon layer and thereby form a Co2Si layer or CoSi layer in at least a surface portion of the silicon layer. Then, a silicon-containing film is deposited on the Co2Si layer or CoSi layer and a second heat treatment at a relatively high temperature is performed with respect to the semiconductor substrate to cause a reaction between the silicon-containing film and the Co2Si layer or CoSi layer and thereby form a CoSi2 layer in at least a surface portion of the silicon layer.

Abstract: A method for fabricating a semiconductor memory device such as an EEPROM including, in a semiconductor substrate having a first conductivity type, forming a source region and a drain region having a second conductivity type opposite to the first conductivity type. A trench having a prescribed thickness from a main surface of said semiconductor substrate toward inside thereof is formed in an area to be an element isolation region of the semiconductor substrate. A remaining portion of the semiconductor substrate defines an element forming region. Embedding an element isolation insulating film in the trench to substantially fill the trench. A first insulating film is formed on the element forming region and on at least a portion of the element isolation insulating film.

Abstract: The present invention has an object of providing a method for manufacturing a semiconductor device wherein an underlying silicon substrate or polycrystalline silicon film is less subject to etching during ashing. A method for manufacturing a semiconductor device according to the present invention comprises the steps of: covering a predetermined portion of an insulating film (2) on the silicon substrate (1) or the polycrystalline silicon film with a photoresist (3); removing a portion of said insulating film (2) not covered with the photoresist by dry etching using an etching gas containing carbon and fluorine; and removing a fluorocarbon film (6) deposited on the surface of the substrate and said photoresist 3 by ashing using at least an oxygen gas while controlling the temperature at 100.degree. C. or lower, wherein the underlying silicon substrate or polycrystalline silicon film is less subject to etching during the ashing.