Patents by Inventor Kyoko Hirata
Kyoko Hirata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110115531Abstract: A PLL comprises a current-controlled oscillator (18) for generating an output clock signal based on a current signal generated based on a phase difference between a reference clock signal and a feedback clock signal, a current source (28), and an initialization switch (26) for performing an open/close operation based on the initialization signal, the initialization switch being inserted in series to an input terminal of the current-controlled oscillator (18) and the current source (28).Type: ApplicationFiled: January 26, 2011Publication date: May 19, 2011Applicant: PANASONIC CORPORATIONInventors: Tatsuo Okamoto, Yukio Arima, Tsuyoshi Ebuchi, Kyoko Hirata
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Patent number: 7940086Abstract: An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between two driving systems that are a voltage driving system and a current driving system. The two driver circuits are connected to a power supply potential via the drive control circuit. Two input signals and inverted logic signals of the input signals are inputted via a selection circuit. According to a control signal inputted into the drive control circuit, the interface circuit switches between the voltage-driving type single-ended transmission system and current driving type differential transmission system.Type: GrantFiled: July 30, 2010Date of Patent: May 10, 2011Assignee: Panasonic CorporationInventors: Hiroshi Suenaga, Osamu Shibata, Yoshiyuki Saito, Toru Iwata, Masayuki Toyama, Kyoko Hirata
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Patent number: 7898305Abstract: A PLL comprises a current-controlled oscillator (18) for generating an output clock signal based on a current signal generated based on a phase difference between a reference clock signal and a feedback clock signal, a current source (28), and an initialization switch (26) for performing an open/close operation based on the initialization signal, the initialization switch being inserted in series to an input terminal of the current-controlled oscillator (18) and the current source (28).Type: GrantFiled: December 31, 2009Date of Patent: March 1, 2011Assignee: Panasonic CorporationInventors: Tatsuo Okamoto, Yukio Arima, Tsuyoshi Ebuchi, Kyoko Hirata
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Patent number: 7843224Abstract: An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between two driving systems that are a voltage driving system and a current driving system. The two driver circuits are connected to a power supply potential via the drive control circuit. Two input signals and inverted logic signals of the input signals are inputted via a selection circuit. According to a control signal inputted into the drive control circuit, the interface circuit switches between the voltage-driving type single-ended transmission system and current driving type differential transmission system.Type: GrantFiled: October 31, 2008Date of Patent: November 30, 2010Assignee: Panasonic CorporationInventors: Hiroshi Suenaga, Osamu Shibata, Yoshiyuki Saito, Toru Iwata, Masayuki Toyama, Kyoko Hirata
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Publication number: 20100289534Abstract: An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between two driving systems that are a voltage driving system and a current driving system. The two driver circuits are connected to a power supply potential via the drive control circuit. Two input signals and inverted logic signals of the input signals are inputted via a selection circuit. According to a control signal inputted into the drive control circuit, the interface circuit switches between the voltage-driving type single-ended transmission system and current driving type differential transmission system.Type: ApplicationFiled: July 30, 2010Publication date: November 18, 2010Inventors: Hiroshi SUENAGA, Osamu Shibata, Yoshiyuki Saito, Toru Iwata, Masayuki Toyama, Kyoko Hirata
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Publication number: 20100171533Abstract: A PLL comprises a current-controlled oscillator (18) for generating an output clock signal based on a current signal generated based on a phase difference between a reference clock signal and a feedback clock signal, a current source (28), and an initialization switch (26) for performing an open/close operation based on the initialization signal, the initialization switch being inserted in series to an input terminal of the current-controlled oscillator (18) and the current source (28).Type: ApplicationFiled: December 31, 2009Publication date: July 8, 2010Applicant: Panasonic CorporationInventors: Tatsuo OKAMOTO, Yukio Arima, Tsuyoshi Ebuchi, Kyoko Hirata
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Patent number: 7746132Abstract: A PLL comprises a current-controlled oscillator (18) for generating an output clock signal based on a current signal generated based on a phase difference between a reference clock signal and a feedback clock signal, a current source (28), and an initialization switch (26) for performing an open/close operation based on the initialization signal, the initialization switch being inserted in series to an input terminal of the current-controlled oscillator (18) and the current source (28).Type: GrantFiled: July 27, 2006Date of Patent: June 29, 2010Assignee: Panasonic CorporationInventors: Tatsuo Okamoto, Yukio Arima, Tsuyoshi Ebuchi, Kyoko Hirata
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Publication number: 20090274254Abstract: The logic block 103 generates a serial-data signal DATA using a clock signal CLK generated by a clock generator 104. Then, a skew adjusting unit 111 adjusts a delay of the serial-data signal DATA based on the phase relationship between the clock signal CLK and the serial-data signal DATA, and outputs resultant serial-data signal DATA-SK and clock signal CLK to a FF circuit 112. The FF circuit 112 shapes the serial-data signal DATA-SK using the clock signal CLK, and transmits the resultant serial-data signal DATA-FF to outside the device. Accordingly, even if jitter of a clock signal is superimposed on a data signal after signal processing, the influence of this jitter is reduced, thus providing a data transmitting device capable of transmitting a data signal to outside the device with the influence of the jitter reduced.Type: ApplicationFiled: June 11, 2007Publication date: November 5, 2009Applicant: PANASONIC CORPORATIONInventor: Kyoko Hirata
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Publication number: 20090153203Abstract: A PLL comprises a current-controlled oscillator (18) for generating an output clock signal based on a current signal generated based on a phase difference between a reference clock signal and a feedback clock signal, a current source (28), and an initialization switch (26) for performing an open/close operation based on the initialization signal, the initialization switch being inserted in series to an input terminal of the current-controlled oscillator (18) and the current source (28).Type: ApplicationFiled: July 27, 2006Publication date: June 18, 2009Inventors: Tatsuo Okamoto, Yukio Arima, Tsuyoshi Ebuchi, Kyoko Hirata
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Publication number: 20090108872Abstract: An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between two driving systems that are a voltage driving system and a current driving system. The two driver circuits are connected to a power supply potential via the drive control circuit. Two input signals and inverted logic signals of the input signals are inputted via a selection circuit. According to a control signal inputted into the drive control circuit, the interface circuit switches between the voltage-driving type single-ended transmission system and current driving type differential transmission system.Type: ApplicationFiled: October 31, 2008Publication date: April 30, 2009Inventors: Hiroshi Suenaga, Osamu Shibata, Yoshiyuki Saito, Toru Iwata, Masayuki Toyama, Kyoko Hirata
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Publication number: 20020156609Abstract: The present invention provides a circuit simulation method for a semiconductor device in which the circuit configuration is specified by a netlist. First, variations in the layout pattern and arrangement of elements used in the semiconductor device are formulated into an equation including parameters (S110). Next, the parameters included in the equation are put into element parameter groupings corresponding to each element, and the element parameter groupings are stored in storage means (S120). Then, the parameters in the element parameter groupings are varied in accordance with the conditions obtained from variations in manufacturing process with respect to the semiconductor device (S130). Then, these varied parameters are used to execute a circuit simulation with processing means (S140).Type: ApplicationFiled: April 19, 2002Publication date: October 24, 2002Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Kyoko Hirata, Hiroshi Shimomura