Patents by Inventor Kyoung-June Min

Kyoung-June Min has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100164949
    Abstract: A system and method of rendering three-dimensional (3D) graphics. The system for rendering 3D graphics may include a plurality of cores including a scratch pad memory, a first memory to perform a control flow, a second memory for loop acceleration, and a shared memory to interpolate with the plurality of cores.
    Type: Application
    Filed: July 20, 2009
    Publication date: July 1, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung June Min, Chan Min Park, Won Jong Lee, Dong-Hoon Yoo
  • Patent number: 7747305
    Abstract: The present invention is directed to a computer aided design method for producing an implant for a patient prior to operation comprising the steps of: generating data with a non-invasive 3D (3-dimensional) scan of the patient's defect site that digitally represents the area that will receive the implant; designing and validating an implant on a computer based on digital data generated from a volume image of the patient; and fabricating the implant based solely on the implant design data generated on computer.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: June 29, 2010
    Assignee: Case Western Reserve University
    Inventors: David Dean, Kyoung-June Min, Robert A. Ratcheson
  • Publication number: 20100115141
    Abstract: A processor and a memory controlling method. The processor enables a Scratch-Pad Memory (SPM) to prepare data that a processor core intends to process, using a data management unit including a data cache, thereby increasing a data processing rate.
    Type: Application
    Filed: February 17, 2009
    Publication date: May 6, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung June Min, Chan Min Park, Won Jong Lee, Kwon Taek Kwon
  • Publication number: 20090089551
    Abstract: Provided are a method and apparatus for avoiding bank conflict. A first instruction that is one of access instructions that are predicted to cause the bank conflict is replaced with a second instruction by changing an execute timing of the first instruction to a timing prior to the execute timing of the first instruction so as for the access instructions not to cause the bank conflict. Next, a load/store unit that is scheduled to access the bank according to the first instruction accesses the bank and reads out a data from the bank at an execute timing of the second instruction, and after that, the load/store unit is allowed to be inputted the read data at the execute timing of the first instruction. Accordingly, although the access instructions that are predicted to cause the bank conflict are allocated to the load/store units, the bank conflict can be prevented, so that it is possible to avoid deterioration in performance due the occurrence of the bank conflict.
    Type: Application
    Filed: February 27, 2008
    Publication date: April 2, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-june Min, Chan-min Park, Suk-jin Kim, Won-jong Lee, Kwon-taek Kwon, Hee-seok Kim
  • Publication number: 20090073163
    Abstract: An apparatus for and method of processing a vertex in relation to 3 dimensional (3D) graphics pipeline are provided. According to the method, while a processor processes vertex data in units of batches, vertex data corresponding to a batch to be processed next is extracted and temporarily stored in a buffer independently of the processor. If the processor finishes processing of the current batch, the batch stored in the buffer is output so that the processor can immediately process the batch.
    Type: Application
    Filed: March 14, 2008
    Publication date: March 19, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-june Min, Chan-min Park, Won-jong Lee, Gyeong-ja Jang
  • Publication number: 20080209159
    Abstract: A memory access method includes: obtaining a, b, and c from a program code for accessing a memory with a triple loop in a program, a being a number of values which an inner-most loop variable of the triple loop may have, b being a number of values which a middle loop variable of the triple loop may have, and c being a number of values which an outer-most loop variable of the triple loop may have; obtaining a starting address of the memory accessed by the triple loop; and obtaining an a×b×c number of addresses of the memory accessed by the triple loop using the starting address and a function.
    Type: Application
    Filed: July 26, 2007
    Publication date: August 28, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong Myon KIM, Soojung RYU, Dong-Hoon YOO, Hong-Seok KIM, Hee Seok KIM, Jeongwook KIM, Kyoung June MIN
  • Publication number: 20080158238
    Abstract: A format conversion apparatus which converts image data of a band interleave format into image data of a band separate format is provided. The apparatus includes a memory which stores image data of a band interleave format; and a converting module which reads the memory by increasing a read address of the memory for each stride, and converts the image data of the band interleave format into image data of a band separate format.
    Type: Application
    Filed: June 27, 2007
    Publication date: July 3, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Jong Myon KIM, Jun Jin KONG, Jeongwook KIM, Suk Jin KIM, Soojung RYU, Kyoung June MIN, Dong-Hoon YOO, Dong Kwan SUH, Yeon Gon CHO
  • Publication number: 20080068375
    Abstract: A method and system for an early Z test in a tile-based three-dimensional rendering is provided. In the method and system for an early Z test, a portion which is not displayed to a user is removed prior to performing a rasterization process, and thereby performing the 3D rendering efficiently. The method includes segmenting a scene into tiles for performing a rendering with respect to a triangle; selecting a first tile of the tiles, which has a tile Z value less than a minimum Z value of the triangle; and performing the rendering with respect to the triangle in remaining tiles excluding the selected first tile of the tiles.
    Type: Application
    Filed: January 19, 2007
    Publication date: March 20, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung June Min, Jong Myon Kim, Hee Seok Kim, Jeong Wook Kim, Suk Jin Kim
  • Publication number: 20080025615
    Abstract: An image interpolation method interpolating image information of a point in a space constructed by a plurality of planes. According to the method, a reliable interpolated value can be rapidly obtained by searching for the nearest plane to the point, obtaining information about a plane facing the nearest plane using image information of one or more vertices of the plane facing the nearest plane, and interpolating the image information of the point using the image information of the one or more vertices of the nearest plane and the obtained information about the plane facing the nearest plane.
    Type: Application
    Filed: May 21, 2007
    Publication date: January 31, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-june Min, Dong-soo Kang, Jong-myon Kim, Eun-jin Ryu
  • Publication number: 20080018664
    Abstract: A tile binning method including: dividing a scene for rendering a triangle, into a plurality of tiles; determining identification values of tile nodes of each of the tiles; and identifying a tile including an entirety or a part of the triangle from the tiles, based on the identification value of the tile nodes for each of the tiles.
    Type: Application
    Filed: November 28, 2006
    Publication date: January 24, 2008
    Inventors: Kyoung June Min, Jeong Wook Kim, Dong Soo Kang, Suk Jin Kim, Hee Seok Kim, Seok Yoon Jung, Sang Oak Woo
  • Publication number: 20070260458
    Abstract: Disclosed is a parallel processing method in a data processing system that temporarily loads data stored in a memory in word registers and parallel-processes subwords constituting the loaded word using Arithmetic Logic Units (ALUs) which are equal in size to the subwords. The method includes generating a shortened subword by removing at least one bit among the bits constituting each subword; and performing parallel computation on the shortened subwords.
    Type: Application
    Filed: February 26, 2007
    Publication date: November 8, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-Myon Kim, Dongsoo Kang, Kyoung-June Min, Eun-Jin Ryu
  • Publication number: 20070217674
    Abstract: Provided is a method for converting a first image signal expressed in a first color space into a second image signal expressed in a second color space on a subword parallelism basis.
    Type: Application
    Filed: March 8, 2007
    Publication date: September 20, 2007
    Applicant: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Jong-Myon Kim, Dongsoo Kang, Kyoung-June Min, Eun-Jin Ryu
  • Publication number: 20060094951
    Abstract: The present invention is directed to a computer aided design method for producing an implant for a patient prior to operation comprising the steps of: generating data with a non-invasive 3D (3-dimensional) scan of the patient's defect site that digitally represents the area that will receive the implant; designing and validating an implant on a computer based on digital data generated from a volume image of the patient; and fabricating the implant based solely on the implant design data generated on computer.
    Type: Application
    Filed: December 9, 2005
    Publication date: May 4, 2006
    Inventors: David Dean, Kyoung-June Min, Robert Ratcheson