Patents by Inventor Kyoung Un KIM

Kyoung Un KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200013932
    Abstract: A semiconductor device package according to the present invention comprises: a semiconductor device including a substrate, a light-emitting structure, and a first pad and second pad electrically connected to the light-emitting structure; a wavelength converting unit disposed to surround the upper surface and side surfaces of the semiconductor device; and a light control unit disposed on the wavelength converting unit, wherein the wavelength converting unit may include an upper surface spaced a first spacing interval apart in a vertical direction from the semiconductor device, and a side surface spaced a second spacing interval apart in a horizontal direction from the semiconductor device. The present invention relates to a semiconductor device package and a light source module.
    Type: Application
    Filed: January 17, 2018
    Publication date: January 9, 2020
    Inventors: Ji Hyung MOON, Kyoung Un KIM, Sun Woo PARK, June O SONG, Sun Woo OH, Sang Jun LEE, Hwan Hee JEONG, Myung Ho HAN
  • Patent number: 10396258
    Abstract: An embodiment comprises: a substrate having a chip mounting region; first and second wiring layers disposed on the substrate around the chip mounting region so as to be spaced apart from each other; and a plurality of light emitting chips disposed on the chip mounting region, wherein the first wiring layer comprises a first wiring pattern disposed at one side of a reference line and having a first concave part, and a first extending pattern extending from the first wiring pattern to the other side of the reference line, the second wiring layer comprises a second wiring pattern disposed at the other side of the reference line and having a second concave part, and a second extending pattern extending from the second wiring pattern to one side of the reference line, and the reference line is a straight line passing through the center of the chip mounting region.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: August 27, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Dae Geun Kim, Kyoung Un Kim, Seul Ki Kim, Bong Kul Min, Gyu Hyeong Bak
  • Publication number: 20190165226
    Abstract: An embodiment provides a semiconductor element package which comprises: a semiconductor element comprising a first electrode pad and a second electrode pad, arranged on one surface thereof; a reflective member disposed on a side surface of the semiconductor element and having a sloping surface; a light-transmitting layer disposed on the sloping surface of the reflective member; and a wavelength conversion member disposed on the semiconductor element and the light-transmitting layer, wherein the sloping surface of the reflective member slopes such that the distance from the side surface of the semiconductor element increases along first direction, the first direction is a direction from one surface of the semiconductor element toward the other surface thereof, and, as the distance from the side surface of the semiconductor element increases, the thickness of the light-transmitting layer decreases and the thickness of the reflective member increases.
    Type: Application
    Filed: May 2, 2017
    Publication date: May 30, 2019
    Inventors: Kyoung Un KIM, Young Jun KO, In Hyun CHO
  • Publication number: 20170200874
    Abstract: An embodiment comprises: a substrate having a chip mounting region; first and second wiring layers disposed on the substrate around the chip mounting region so as to be spaced apart from each other; and a plurality of light emitting chips disposed on the chip mounting region, wherein the first wiring layer comprises a first wiring pattern disposed at one side of a reference line and having a first concave part, and a first extending pattern extending from the first wiring pattern to the other side of the reference line, the second wiring layer comprises a second wiring pattern disposed at the other side of the reference line and having a second concave part, and a second extending pattern extending from the second wiring pattern to one side of the reference line, and the reference line is a straight line passing through the center of the chip mounting region.
    Type: Application
    Filed: May 13, 2015
    Publication date: July 13, 2017
    Inventors: Dae Geun KIM, Kyoung Un KIM, Seul Ki KIM, Bong Kul MIN, Gyu Hyeong BAK