Patents by Inventor KyoWang Koo

KyoWang Koo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170416
    Abstract: A semiconductor device has a substrate. A first component and second component are disposed over the substrate. The first component includes an antenna. A lid is disposed over the substrate between the first component and second component. An encapsulant is deposited over the substrate and lid. A conductive layer is formed over the encapsulant and in contact with the lid. A first portion of the conductive layer over the first component is removed using laser ablation.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 23, 2024
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoWang Koo, SungWon Cho, BongWoo Choi, JiWon Lee
  • Patent number: 11990421
    Abstract: A semiconductor device has a substrate and first and second electrical component disposed over the substrate. A first metal bar is disposed over the substrate between the first electrical component and second electrical component. The first metal bar is formed by disposing a mask over a carrier. An opening is formed in the mask and a metal layer is sputtered over the mask. The mask is removed to leave the metal layer within the opening as the first metal bar. The first metal bar can be stored in a tape-and-reel.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: May 21, 2024
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: YongKook Shin, KyoWang Koo, HeeYoun Kim, SeongKuk Kim
  • Patent number: 11935840
    Abstract: A semiconductor device has a substrate. A first component and second component are disposed over the substrate. The first component includes an antenna. A lid is disposed over the substrate between the first component and second component. An encapsulant is deposited over the substrate and lid. A conductive layer is formed over the encapsulant and in contact with the lid. A first portion of the conductive layer over the first component is removed using laser ablation.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: March 19, 2024
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoWang Koo, SungWon Cho, BongWoo Choi, JiWon Lee
  • Publication number: 20240021366
    Abstract: An electronic package comprises: a substrate; five-sided insulated electronic components, wherein each of the five-sided insulated electronic components comprises: a raw electronic component having a cuboid shape, wherein the raw electronic component has a bottom side at which the raw electronic component is mounted onto and connected with the substrate and five non-bottom sides; a conductive structure disposed on the bottom side of the raw electronic component; and an insulating layer disposed on the five non-bottom sides of the raw electronic component.
    Type: Application
    Filed: July 17, 2023
    Publication date: January 18, 2024
    Inventors: KyoWang KOO, MinHee JEONG
  • Publication number: 20230411304
    Abstract: A semiconductor device and a method for making the same are provided. The semiconductor device includes: a substrate including a substrate top surface and a substrate bottom surface; an electronic component mounted on the substrate top surface; a bottom encapsulant disposed on the substrate top surface and encapsulating the electronic component; a top encapsulant disposed on the bottom encapsulant; an internal shielding layer disposed between the bottom encapsulant and the top encapsulant, wherein a projection of the internal shielding layer onto the substrate top surface overlaps with the electronic component, the internal shielding layer has an internal shielding layer lateral surface, and a portion of the internal shielding layer lateral surface is exposed from the bottom encapsulant and the top encapsulant; and an external shielding layer covering the bottom encapsulant and the top encapsulant and contacting with the exposed portion of the internal shielding layer lateral surface.
    Type: Application
    Filed: May 6, 2023
    Publication date: December 21, 2023
    Inventors: Heeyoun KIM, KyoWang KOO, Junghoon KIM, Youngsang KIM, Kyungmoon KIM
  • Publication number: 20230402401
    Abstract: A semiconductor device has a substrate. An electrical component is disposed over a surface of the substrate. An encapsulant is deposited over the electrical component and substrate. A portion of the surface of the substrate remains exposed from the encapsulant. A shielding layer is formed over the encapsulant. A portion of the shielding layer is removed to expose the portion of the surface of the substrate.
    Type: Application
    Filed: August 24, 2023
    Publication date: December 14, 2023
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoWang Koo, SungWon Cho, BongWoo Choi, JiWon Lee
  • Publication number: 20230337369
    Abstract: A stencil mask and a stencil printing method are provided. The stencil mask includes: a non-reinforcement portion having a mask surface configured to contact a substrate surface of a substrate; and a reinforcement portion having a thickness greater than that of the non-reinforcement portion, wherein the reinforcement portion includes: an embossed surface for insertion into a cavity of substrate and configured to contact a cavity bottom surface when the stencil mask is placed onto the substrate for stencil printing; and at least one first stencil window that allows the fluid material to flow through the reinforcement portion, wherein the at least one first stencil window is aligned with the at least one printing region within the cavity when the stencil mask is placed onto the substrate for stencil printing.
    Type: Application
    Filed: April 12, 2023
    Publication date: October 19, 2023
    Inventors: KyoWang KOO, KiCheol LEE, BoLee LIM
  • Publication number: 20230326769
    Abstract: A method for making a semiconductor device is provided. The method includes: providing a package including: a substrate including a top surface and a bottom surface; a top electronic component mounted on the top surface of the substrate; at least one conductive pillar formed on the bottom surface of the substrate; and a protection layer attached on the bottom surface of the substrate and covering the at least one conductive pillar; providing a molding apparatus including a top chase and a bottom chase, wherein a molding material is held in the bottom chase; attaching the protection layer onto the top chase of the molding apparatus; and moving the top chase and the bottom chase close to each other to compress the molding material to cover the top electronic component on the top surface of the substrate, thereby forming a top encapsulation on the top surface of the substrate.
    Type: Application
    Filed: March 16, 2023
    Publication date: October 12, 2023
    Inventors: KyoWang KOO, SeoJun BAE, JungSub LEE
  • Patent number: 11784133
    Abstract: A semiconductor device has a substrate. An electrical component is disposed over a surface of the substrate. An encapsulant is deposited over the electrical component and substrate. A portion of the surface of the substrate remains exposed from the encapsulant. A shielding layer is formed over the encapsulant. A portion of the shielding layer is removed to expose the portion of the surface of the substrate.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: October 10, 2023
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoWang Koo, SungWon Cho, BongWoo Choi, JiWon Lee
  • Publication number: 20230268315
    Abstract: The present application relates to a method for making semiconductor packages. The method for making semiconductor packages comprises forming a semiconductor package array, the semiconductor package array having at its first side a interconnect encasing layer; attaching an adhesive tape onto the interconnect encasing layer, wherein the adhesive layer has an adhesive layer and a base film; removing, by a laser beam, the base film of the adhesive tape at a predetermined ablation region; and singulating the semiconductor package array along the predetermined ablation regions to separate the semiconductor package array into a plurality of semiconductor packages.
    Type: Application
    Filed: February 7, 2023
    Publication date: August 24, 2023
    Inventors: JiSik MOON, DongJun SEO, JungSub LEE, KyoWang KOO
  • Patent number: 11728281
    Abstract: A semiconductor device has a substrate including a terminal and an insulating layer formed over the terminal. An electrical component is disposed over the substrate. An encapsulant is deposited over the electrical component and substrate. A portion of the insulating layer over the terminal is exposed from the encapsulant. A shielding layer is formed over the encapsulant and terminal. A portion of the shielding layer is removed to expose the portion of the insulating layer. The portion of the insulating layer is removed to expose the terminal. The portion of the shielding layer and the portion of the insulating layer can be removed by laser ablation.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: August 15, 2023
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoWang Koo, SungWon Cho, BongWoo Choi
  • Publication number: 20230230934
    Abstract: A semiconductor device has a substrate and first and second electrical component disposed over the substrate. A first metal bar is disposed over the substrate between the first electrical component and second electrical component. The first metal bar is formed by disposing a mask over a carrier. An opening is formed in the mask and a metal layer is sputtered over the mask. The mask is removed to leave the metal layer within the opening as the first metal bar. The first metal bar can be stored in a tape-and-reel.
    Type: Application
    Filed: January 19, 2022
    Publication date: July 20, 2023
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: YongKook Shin, KyoWang Koo, HeeYoun Kim, SeongKuk Kim
  • Publication number: 20220384360
    Abstract: A semiconductor device has a substrate. A first component and second component are disposed over the substrate. The first component includes an antenna. A lid is disposed over the substrate between the first component and second component. An encapsulant is deposited over the substrate and lid. A conductive layer is formed over the encapsulant and in contact with the lid. A first portion of the conductive layer over the first component is removed using laser ablation.
    Type: Application
    Filed: August 4, 2022
    Publication date: December 1, 2022
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoWang Koo, SungWon Cho, BongWoo Choi, JiWon Lee
  • Patent number: 11444035
    Abstract: A semiconductor device has a substrate. A first component and second component are disposed over the substrate. The first component includes an antenna. A lid is disposed over the substrate between the first component and second component. An encapsulant is deposited over the substrate and lid. A conductive layer is formed over the encapsulant and in contact with the lid. A first portion of the conductive layer over the first component is removed using laser ablation.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: September 13, 2022
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoWang Koo, SungWon Cho, BongWoo Choi, JiWon Lee
  • Publication number: 20210335724
    Abstract: A semiconductor device has a substrate. A lid is disposed over the substrate. An encapsulant is deposited over the substrate. A film mask is disposed over the encapsulant with the lid exposed from the film mask and encapsulant. A conductive layer is formed over the film mask, encapsulant, and lid. The film mask is removed after forming the conductive layer.
    Type: Application
    Filed: July 7, 2021
    Publication date: October 28, 2021
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoungHee Park, KyoWang Koo, SungWon Cho
  • Patent number: 11145603
    Abstract: An integrated circuit packaging system and method of manufacture thereof includes: a substrate with internal circuitry between a substrate top side, a substrate bottom side, and vertical sides; an integrated circuit coupled to the internal circuitry; a molded package body formed directly on the integrated circuit and the substrate top side of the substrate; and a conductive conformal shield structure applied directly on the molded package body, the vertical sides, and to extend below the substrate bottom side coupled to the internal circuitry.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: October 12, 2021
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Byung Joon Han, Il Kwon Shim, KyoungHee Park, Yaojian Lin, KyoWang Koo, In Sang Yoon, SeungYong Chai, SungWon Cho, SungSoo Kim, Hun Teak Lee, DeokKyung Yang
  • Patent number: 11088082
    Abstract: A semiconductor device has a substrate. A lid is disposed over the substrate. An encapsulant is deposited over the substrate. A film mask is disposed over the encapsulant with the lid exposed from the film mask and encapsulant. A conductive layer is formed over the film mask, encapsulant, and lid. The film mask is removed after forming the conductive layer.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: August 10, 2021
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Changoh Kim, Kyounghee Park, Kyowang Koo, Sungwon Cho
  • Publication number: 20210210437
    Abstract: A semiconductor device has a substrate including a terminal and an insulating layer formed over the terminal. An electrical component is disposed over the substrate. An encapsulant is deposited over the electrical component and substrate. A portion of the insulating layer over the terminal is exposed from the encapsulant. A shielding layer is formed over the encapsulant and terminal. A portion of the shielding layer is removed to expose the portion of the insulating layer. The portion of the insulating layer is removed to expose the terminal. The portion of the shielding layer and the portion of the insulating layer can be removed by laser ablation.
    Type: Application
    Filed: March 18, 2021
    Publication date: July 8, 2021
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoWang Koo, SungWon Cho, BongWoo Choi
  • Patent number: 11024585
    Abstract: An integrated circuit packaging system and method of manufacture thereof includes: a substrate with internal circuitry between a substrate top side, a substrate bottom side, and vertical sides; an integrated circuit coupled to the internal circuitry; a molded package body formed directly on the integrated circuit and the substrate top side of the substrate; and a conductive conformal shield structure applied directly on the molded package body, the vertical sides, and to extend below the substrate bottom side coupled to the internal circuitry.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: June 1, 2021
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Byung Joon Han, Il Kwon Shim, KyoungHee Park, Yaojian Lin, KyoWang Koo, In Sang Yoon, SeungYong Chai, SungWon Cho, SungSoo Kim, Hun Teak Lee, DeokKyung Yang
  • Publication number: 20210118810
    Abstract: A semiconductor device has a substrate. An electrical component is disposed over a surface of the substrate. An encapsulant is deposited over the electrical component and substrate. A portion of the surface of the substrate remains exposed from the encapsulant. A shielding layer is formed over the encapsulant. A portion of the shielding layer is removed to expose the portion of the surface of the substrate.
    Type: Application
    Filed: December 29, 2020
    Publication date: April 22, 2021
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoWang Koo, SungWon Cho, BongWoo Choi, JiWon Lee