Abstract: A method may include operating a single-photon avalanche diode (SPAD) in a first mode to determine a light intensity level associated with the SPAD, operating the SPAD in a second mode wherein a reverse bias voltage is applied in the second mode to bias the SPAD beyond its breakdown voltage, such that the SPAD operates in a detection mode, and determining a magnitude of the bias voltage applied to the SPAD in the second mode based on the light intensity level determined in the first mode.

Abstract: A method may include operating a single-photon avalanche diode (SPAD) in a first mode to determine a light intensity level associated with the SPAD, operating the SPAD in a second mode wherein a reverse bias voltage is applied in the second mode to bias the SPAD beyond its breakdown voltage, such that the SPAD operates in a detection mode, and determining a magnitude of the bias voltage applied to the SPAD in the second mode based on the light intensity level determined in the first mode.

Abstract: An integrated circuit including a Schottky diode, and a method of making the same. The diode includes an active region bordered by an isolation region in a semiconductor substrate of the integrated circuits, a first electrode having a metal contact provided on a surface of the active region, and a second electrode having a silicide contact also provided on the surface of the active region.

Abstract: A method of manufacturing Schottky diodes in a CMOS process includes forming wells, including first wells (16) for forming CMOS devices and second wells (18) for forming Schottky devices. Then, transistors are formed in the first wells, the second wells protected with a protection layer (20) and suicide contacts (40) formed to source and drain regions in the first wells. The protection layer is then removed, a Schottky material deposited and etched away except in a contact region in each second well to form a Schottky contact between the Schottky material (74) and each second well (18).

Abstract: A semiconductor chip has an integrated inductor, manufactured during back end of line processing. In particular, a loop (30) is formed in a metallization layer and a central region (32) of magnetic material is provided within the loop. The size of the central region is controlled so that it includes no more than five magnetic domains to achieve the desired properties.

Abstract: A method of manufacturing Schottky diodes in a CMOS process includes forming wells, including first wells (16) for forming CMOS devices and second wells (18) for forming Schottky devices. Then, transistors arc formed in the first wells, the second wells protected with a protection layer (20) and suicide contacts (40) formed to source and drain regions in the first wells. The protection layer is then removed, a Schottky material deposited and etched away except in a contact region in each second well to form a Schottky contact between the Schottky material (74) and each second well (18).

Abstract: An integrated circuit including a Schottky diode, and a method of making the same. The diode includes an active region bordered by an isolation region in a semiconductor substrate of the integrated circuits, a first electrode having a metal contact provided on a surface of the active region, and a second electrode having a silicide contact also provided on the surface of the active region.