Patents by Inventor Kyu Won Choi
Kyu Won Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240128930Abstract: The present disclosure relates to an offset elimination operation of an internal operational amplifier of a data driving circuit and relates to a technique that applies different offset elimination methods for each position of an operational amplifier.Type: ApplicationFiled: October 13, 2023Publication date: April 18, 2024Applicant: LX SEMICON CO., LTD.Inventors: Yong Sung AHN, Ji Won KIM, Hyo Joong KIM, Kyung Min SHIN, Kyu Tae LEE, Ha Rim CHOI
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Publication number: 20240128517Abstract: Disclosed is an electrode assembly, a battery, and a battery pack and a vehicle including the same. In the electrode assembly, a first electrode, a second electrode, and a separator interposed therebetween are wound based on an axis to define a core and an outer circumference. The first electrode includes an uncoated portion at a long side end thereof and exposed out of the separator along a winding axis direction of the electrode assembly. A part of the uncoated portion is bent in a radial direction of the electrode assembly to form a bending surface region that includes overlapping layers of the uncoated portion, and in a partial region of the bending surface region, the number of stacked layers of the uncoated portion is 10 or more in the winding axis direction of the electrode assembly.Type: ApplicationFiled: January 19, 2022Publication date: April 18, 2024Applicant: LG ENERGY SOLUTION, LTD.Inventors: Hae-Jin LIM, Jin-Hak KONG, Soon-O LEE, Kyu-Hyun CHOI, Do-Gyun KIM, Su-Ji CHOI, Kwang-Su HWANGBO, Geon-Woo MIN, Min-Ki JO, Jae-Won LIM, Hak-Kyun KIM, Je-Jun LEE, Ji-Min JUNG, Jae-Woong KIM, Jong-Sik PARK, Yu-Sung CHOE, Byoung-Gu LEE, Duk-Hyun RYU, Kwan-Hee LEE, Jae-Eun LEE, Bo-Hyun KANG, Pil-Kyu PARK
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Patent number: 11945744Abstract: Disclosed are a method and apparatus for reusing wastewater. The method for reusing wastewater disclosed herein includes: generating a mixed wastewater by mixing multiple types of wastewater (S20); performing a first purification by passing the mixed wastewater through a flocculation-sedimentation unit (S40); performing a second purification by passing an effluent of the flocculation-sedimentation unit through a membrane bioreactor (MBR) (S60); performing a third purification by passing an effluent of the MBR through a reverse-osmosis membrane unit (S80); and reusing an effluent of the reverse-osmosis membrane unit as cooling water or industrial water (S100).Type: GrantFiled: April 14, 2023Date of Patent: April 2, 2024Assignees: SAMSUNG ENGINEERING CO., LTD., SAMSUNG ELECTRONICS CO., LTDInventors: Seok Hwan Hong, Dae Soo Park, Seung Joon Chung, Yong Xun Jin, Jae Hyung Park, Jae Hoon Choi, Jae Dong Hwang, Jong Keun Yi, Su Hyoung Cho, Kyu Won Hwang, June Yurl Hur, Je Hun Kim, Ji Won Chun
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Patent number: 11939239Abstract: A sterilization module including a light source configured to irradiate ultraviolet light, a board on which the light source is mounted, a protective tube accommodating the board therein and configured to transmit ultraviolet light irradiated from the light source, a first base coupled to one side of the protective tube, and a second base coupled to the other side of the protective tube, in which at least one of the first base and the second base includes an insertion part to be inserted into the protective tube, the insertion part having a first diameter when viewed in a first cross-section perpendicular to a length direction of the protective tube, and a cover part integrally formed on the insertion part and having a second diameter greater than the first diameter in the first cross-section.Type: GrantFiled: April 13, 2018Date of Patent: March 26, 2024Assignee: Seoul Viosys Co., Ltd.Inventors: Jae Young Choi, Woong Ki Jeong, Kyu Won Han, Yeo Jin Yoon
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Patent number: 11939240Abstract: A sterilizing device includes a pipe having an inlet and an outlet and allowing fluid to move therethrough and a light source provided on one side of the pipe and providing light to the fluid. At least a portion of the pipe is provided in a spiral shape and the inlet and/or the outlet are arranged in a light emitting region.Type: GrantFiled: December 21, 2022Date of Patent: March 26, 2024Assignee: SEOUL VIOSYS CO., LTD.Inventors: Jae Young Choi, Shi Hyun Ahn, Ki Yon Park, Woong Ki Jeong, Kyu Won Han
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Patent number: 11923035Abstract: A pseudo dual port memory device in which an operating speed is improved and stability is increased is provided. The pseudo dual port memory device may include a memory cell, a pair of bit lines connected to the memory cell, a write driver, a sense amp, and a column multiplexer which is connected to the bit lines, receives a write multiplexer control signal and a read multiplexer control signal, connects the bit lines to the write driver in response to the write multiplexer control signal, and connects the bit lines to the sense amp in response to the read multiplexer control signal. A precharge control signal generation circuit which is connected to the column multiplexer may generate a precharge control signal on the basis of the read and write multiplexer control signals, and a bit line precharge circuit may precharge the bit lines based on the precharge control signal.Type: GrantFiled: February 10, 2022Date of Patent: March 5, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Chan Ho Lee, Tae Min Choi, Jeong Kyun Kim, Hyeong Cheol Kim, Suk Youn, Ju Chang Lee, Kyu Won Choi
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Publication number: 20220392513Abstract: A memory device and operating method of the memory device are provided. The memory device comprises a memory cell storing data based on a first voltage, a row decoder selecting a wordline of the memory cell based on the first voltage, and a wordline predecoder configured to generate a “predec” signal, which is for generating a wordline voltage to be provided to the row decoder. The wordline predecoder is driven by the first voltage and a second voltage, which is different from the first voltage, receives a row address signal, associated with selecting the wordline, and an internal clock signal associated with adjusting operating timings of elements included in the memory device. The wordline predecoder performs a NAND operation on the row address signal and the internal clock signal, and provides the “predec” signal generated based on a result of the NAND operation to the row decoder.Type: ApplicationFiled: December 30, 2021Publication date: December 8, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Kyu Won CHOI, Tae Min CHOI, Hyeong Cheol KIM, Chan Ho LEE
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Publication number: 20220366944Abstract: A pseudo dual port memory device in which an operating speed is improved and stability is increased is provided. The pseudo dual port memory device may include a memory cell, a pair of bit lines connected to the memory cell, a write driver, a sense amp, and a column multiplexer which is connected to the bit lines, receives a write multiplexer control signal and a read multiplexer control signal, connects the bit lines to the write driver in response to the write multiplexer control signal, and connects the bit lines to the sense amp in response to the read multiplexer control signal. A precharge control signal generation circuit which is connected to the column multiplexer may generate a precharge control signal on the basis of the read and write multiplexer control signals, and a bit line precharge circuit may precharge the bit lines based on the precharge control signal.Type: ApplicationFiled: February 10, 2022Publication date: November 17, 2022Inventors: Chan Ho Lee, Tae Min Choi, Jeong Kyun Kim, Hyeong Cheol Kim, Suk Youn, Ju Chang Lee, Kyu Won Choi
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Patent number: 11437320Abstract: A semiconductor device includes a substrate including a first cell region, a second cell region adjacent to the first cell region in a first direction, and a comparison region adjacent the first and second cell regions in a second direction, a bit line in a first metal level on the substrate and extending in the first direction, and a first ground rail in a second metal level different from the first metal level. The first ground rail comprises a first sub-ground rail extending in the second direction on the first cell region, a second sub-ground rail extending in the second direction on the second cell region, a third sub-ground rail connecting the first sub-ground rail to the second sub-ground rail on the first and second cell regions, and a fourth sub-ground rail that branches off from the third sub-ground rail and extends in the second direction.Type: GrantFiled: March 31, 2020Date of Patent: September 6, 2022Inventors: Suk Youn, Chan Ho Lee, Uk Rae Cho, Woo jin Jung, Kyu Won Choi
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Publication number: 20210028109Abstract: A semiconductor device includes a substrate including a first cell region, a second cell region adjacent to the first cell region in a first direction, and a comparison region adjacent the first and second cell regions in a second direction, a bit line in a first metal level on the substrate and extending in the first direction, and a first ground rail in a second metal level different from the first metal level. The first ground rail comprises a first sub-ground rail extending in the second direction on the first cell region, a second sub-ground rail extending in the second direction on the second cell region, a third sub-ground rail connecting the first sub-ground rail to the second sub-ground rail on the first and second cell regions, and a fourth sub-ground rail that branches off from the third sub-ground rail and extends in the second direction.Type: ApplicationFiled: March 31, 2020Publication date: January 28, 2021Inventors: Suk Youn, Chan Ho Lee, Uk Rae Cho, Woo jin Jung, Kyu Won Choi
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Patent number: 8155337Abstract: A compatible circuit and method for 4- and 5-pole earphones and a portable device are disclosed. The compatible circuit and method alter the path of audio signals, using switches, according to control signals, so that the 4-pole earphone can be used in a portable device designed primarily for a 5-pole earphone. The apparatus and method include determining the type of earphone, altering the audio signal path according to the type of earphone, and transmitting the audio signal to the earphone.Type: GrantFiled: November 24, 2008Date of Patent: April 10, 2012Assignee: Samsung Electronics Co., LtdInventors: Kyu Won Choi, Jong Nam Jun, Nam Hyung Kim, Mi Jin Kim
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Publication number: 20090136058Abstract: A compatible circuit and method for 4- and 5-pole earphones and a portable device are disclosed. The compatible circuit and method alter the path of audio signals, using switches, according to control signals, so that the 4-pole earphone can be used in a portable device designed primarily for a 5-pole earphone. The apparatus and method include determining the type of earphone, altering the audio signal path according to the type of earphone, and transmitting the audio signal to the earphone.Type: ApplicationFiled: November 24, 2008Publication date: May 28, 2009Applicant: Samsung Electronics Co. Ltd.Inventors: Kyu Won CHOI, Jong Nam JUN, Nam Hyung KIM, Mi Jin KIM