Patents by Inventor Kyung-Ho Hyun

Kyung-Ho Hyun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240139003
    Abstract: Provided is a bioresorbable stent including a stent substrate including a bioresorbable polymer and a contrast medium containing an iodine component, coated on the stent substrate. Since the stent according to the present invention is absorbed in and removed from the human body after a predetermined time, it has excellent biodegradability since it has improved radiopacity by iodine contrast medium coating, it has a high radiography contrast and is very efficient even when a procedure is performed with real time radiography, and since it has low foreshortening and high flexibility, radial force, and re-coil, it may be useful for insertion into a blood vessel having a small diameter, an acute occlusive lesion, an imminent occlusive lesion, and the like.
    Type: Application
    Filed: May 13, 2022
    Publication date: May 2, 2024
    Inventors: Myung Ho JEONG, Dae Sung PARK, Jae Un KIM, Mun Ki KIM, Doo Sun SIM, Kyung Hoon CHO, Dae Young HYUN, Jun Kyu PARK
  • Patent number: 6423998
    Abstract: A semiconductor device capacitor has a storage electrode wherein the impurity concentration decreases from the bottom to the top thereof. The semiconductor device capacitor is formed on a lower structure of a semiconductor substrate burying a contact hole formed on the semiconductor substrate. The impurity concentration linearly or non-linearly decreases going upward from the bottom of the contact hole to the top of the storage electrode. A method of manufacturing the semiconductor device capacitor also provides that the storage electrode is formed such that the concentration of impurities decreases linearly or non-linearly going upward from the bottom toward the top.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: July 23, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-ho Hyun, Byung-soo Koo, Wook-sung Son, Chang-jip Yang
  • Patent number: 6326322
    Abstract: The present invention relates to a method for depositing a silicon nitride layer in which a NH3 treatment is performed in a LPCVD chamber having a high pressure valve under operational conditions of high pressure and low temperature. This has the effect of shortening a total operational time required for the NH3 treatment without any decrease in the effectiveness of nitridation. It can also prevent a loss in the operational time in the process of depositing a silicon nitride layer. The method includes the steps of: placing a wafer having an oxide layer in an LPCVD chamber having a high pressure valve under operational conditions of high pressure (for instance, 5˜300 Torr) and low temperature (for instance, 670±50° C.); performing an NH3 treatment on the wafer; and depositing a silicon nitride layer on the wafer at the same temperature as the NH3 treatment is performed at.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: December 4, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Young Kim, Kyung-Ho Hyun, Joong-Il An
  • Patent number: 6323084
    Abstract: A semiconductor device capacitor has a storage electrode wherein the impurity concentration decreases from the bottom to the top thereof. The semiconductor device capacitor is formed on a lower structure of a semiconductor substrate burying a contact hole formed on the semiconductor substrate. The impurity concentration linearly or non-linearly decreases going upward from the bottom of the contact hole to the top of the storage electrode. A method of manufacturing the semiconductor device capacitor also provides that the storage electrode is formed such that the concentration of impurities decreases linearly or non-linearly going upward from the bottom toward the top.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: November 27, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-ho Hyun, Byung-soo Koo, Wook-sung Son, Chang-jip Yang
  • Patent number: 6265264
    Abstract: A method of fabricating a capacitor of a semiconductor device maximizes the imurity density of HSG formed at a surface of an electrode of the capacitor and thereby improves capacitance and breakdown voltage characteristics of a DRAM device incorporating the same. The method includes forming an inter-level insulating layer having a buried contact hole which exposes the underlying semiconductor substrate, forming an amorphous polysilicon layer doped with a low density of a p-type impurity on the resultant structure, selectively etching the polysilicon layer with a mask having a pattern configured to form a bottom electrode over a predetermined portion of the inter-level insulating layer which includes the contact hole, causing HSG to grow on the exposed surface of the bottom electrode, and doping PH3 into the HSG under a “low temperature/ high pressure” process condition.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: July 24, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joong-Il An, Kyung-Ho Hyun, Byung-Su Koo, Sun-Woo Kwak