Patents by Inventor Lajos Burgyan

Lajos Burgyan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8597979
    Abstract: Three dimensional Panel-Level Packaging (3D-PLP) fabrication techniques for mass-production of small, simple three dimensional electronic component packages or units such as a DC-DC Converters are described where each package or unit consists of at least an active semiconductor die and a passive, two-terminal electrical circuit element (capacitor inductor and/or resistor).
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: December 3, 2013
    Inventor: Lajos Burgyan
  • Patent number: 8564092
    Abstract: In one aspect, the present invention relates generally to integrated circuit (IC) packages and more specific to some embodiments of IC power convertor technologies. In particular, IC packages that have a high degree of scalability to handle high voltage or current levels, good heat dissipation properties, flexible adaptability to generate packages operable at a wide range of current levels and having a wide range of power adaptability, lends itself to rapid inexpensive prototyping, the ability to adapt various substrates and IC devices to one another without extensive retooling or custom designing of components, as well as other advantages.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: October 22, 2013
    Assignee: National Semiconductor Corporation
    Inventors: Lajos Burgyan, Marc Davis-Marsh
  • Publication number: 20120217614
    Abstract: In one aspect, the present invention relates generally to integrated circuit (IC) packages and more specific to some embodiments of IC power convertor technologies. In particular, IC packages that have a high degree of scalability to handle high voltage or current levels, good heat dissipation properties, flexible adaptability to generate packages operable at a wide range of current levels and having a wide range of power adaptability, lends itself to rapid inexpensive prototyping, the ability to adapt various substrates and IC devices to one another without extensive retooling or custom designing of components, as well as other advantages.
    Type: Application
    Filed: February 25, 2011
    Publication date: August 30, 2012
    Applicant: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Lajos Burgyan, Marc Davis-Marsh
  • Patent number: 8044673
    Abstract: A re-configurable test socket system and test socket architecture are described involving a combination of particular micro elements and re-useable macro elements that can be reused and reconfigured for testing a wide variety of different semiconductor and integrated circuit (IC) DUT packages having different shapes, sizes, and terminal configurations.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: October 25, 2011
    Inventor: Lajos Burgyan
  • Patent number: 7116086
    Abstract: Embodiments of the invention provide for a system and method for driving LEDs with consistently good illumination and superior efficiency at lower cost and suitable for use with cheaper LEDs or with LEDs having wide component parameter tolerances over wide operating voltages and temperature variations.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: October 3, 2006
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Lajos Burgyan, Francois Prinz
  • Patent number: 6995995
    Abstract: A power control circuit is provided containing a switch array, which includes segmented switches, a flying capacitor, an output voltage terminal, a feedback loop, and a digital voltage regulator block. The digital voltage regulator block includes an A/D converter, an encoder, an add-subtractor, and a gate logic. These power control circuits do not include pass transistors. A method is also provided, where the charge pumps of the power control circuit are operated in two-phase cycles including a charging phase and a pumping phase. The power control circuit is controlled in both of these phases, thereby reducing the ripple of the output voltage.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: February 7, 2006
    Assignee: Fairchild Semiconductor Corporation
    Inventors: James S. Zeng, Sridhar Kotikalapoodi, Lajos Burgyan
  • Patent number: 6920055
    Abstract: A charge pumping system capable of a forward operation mode and a reverse operation mode is provided. In forward operation mode the charge pumping system can step-up an input voltage at a ratio of ½:1 and can step-down the input voltage at a ratio of n:m where n and m are both integer values and n is equal to or greater than m. In reverse operation mode the charge pumping system can step-down the input voltage at a ratio of 1:½ and 1:1 and can step-up the input voltage at a ratio of p:q where p and q are both integer values and p is less than q.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: July 19, 2005
    Assignee: Fairchild Semiconductor Corporation
    Inventors: James S. Zeng, Lajos Burgyan, Rendon A. Holloway
  • Publication number: 20050122751
    Abstract: A power control circuit is provided containing a switch array, which includes segmented switches, a flying capacitor, an output voltage terminal, a feedback loop, and a digital voltage regulator block. The digital voltage regulator block includes an A/D converter, an encoder, an add-subtractor, and a gate logic. These power control circuits do not include pass transistors. A method is also provided, where the charge pumps of the power control circuit are operated in two-phase cycles including a charging phase and a pumping phase. The power control circuit is controlled in both of these phases, thereby reducing the ripple of the output voltage.
    Type: Application
    Filed: December 3, 2003
    Publication date: June 9, 2005
    Inventors: James Zeng, Sridhar Kotikalapoodi, Lajos Burgyan
  • Publication number: 20040080301
    Abstract: Embodiments of the invention provide for circuits for driving LEDs with consistently good illumination and superior efficiency at lower cost and suitable for use with cheaper LEDs or with LEDs having wide component parameter tolerances over wide operating voltages and temperature variations. Circuits disclosed may be, but need not be, embodied on a single semiconductor chip.
    Type: Application
    Filed: December 5, 2003
    Publication date: April 29, 2004
    Inventors: Lajos Burgyan, Francois Prinz
  • Patent number: 6690146
    Abstract: Embodiments of the invention provide for circuits for driving LEDs with consistently good illumination and superior efficiency at lower cost and suitable for use with cheaper LEDs or with LEDs having wide component parameter tolerances over wide operating voltages and temperature variations. Circuits disclosed may be, but need not be, embodied on a single semiconductor chip.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: February 10, 2004
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Lajos Burgyan, Francois Prinz
  • Publication number: 20030235062
    Abstract: Embodiments of the invention provide for circuits for driving LEDs with consistently good illumination and superior efficiency at lower cost and suitable for use with cheaper LEDs or with LEDs having wide component parameter tolerances over wide operating voltages and temperature variations. Circuits disclosed may be, but need not be, embodied on a single semiconductor chip.
    Type: Application
    Filed: August 27, 2002
    Publication date: December 25, 2003
    Inventors: Lajos Burgyan, Francois Prinz
  • Patent number: 6657875
    Abstract: A charge pumping system capable of a forward operation mode and a reverse operation mode is provided. In forward operation mode the charge pumping system can step-up an input voltage at a ratio of ½:1 and can step-down the input voltage at a ratio of at east one of 1:1, 3:2, 2:1 and 3:1. In reverse operation mode the charge pumping system can step-down the input voltage at a ratio of 1:½and 1:1 and can step-up the input voltage at a ratio of at least one of 2:3, 1:2 and 1:3.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: December 2, 2003
    Assignee: Fairchild Semiconductor Corporation
    Inventors: James S. Zeng, Lajos Burgyan, Rendon A. Holloway
  • Patent number: 6219262
    Abstract: A current sensing device incorporated into the gate charge current path of the power transistor in a typical pulse-width modulated current mode switching power supply controller provides adaptive leading edge blanking of the current-sense waveform present in the feedback signal to prevent erroneous response in the feedback control circuitry and improve regulation of the power supply output voltage. A serial switch located within the current-sense feedback signal path is directly controlled by the current sensing device to open and close the signal path and generate a blanking interval which is optimally aligned to blank out or remove the leading edge spike in the current-sense waveform which corresponds to the gate charge current pulse that occurs during the turn-on transition of the power transistor.
    Type: Grant
    Filed: May 8, 2000
    Date of Patent: April 17, 2001
    Assignee: Semtech Corporation
    Inventor: Lajos Burgyan
  • Patent number: 6130526
    Abstract: A fast buffer and switching regulator are combined in parallel in a master-slave loop topology to form a voltage regulator. The buffer circuit has a voltage sensing amplifier that senses the difference between the voltage at the output of the voltage regulator and a reference voltage. This voltage difference is amplified, and then input to a buffer that sources current to or sinks current from the output of the voltage regulator. The output of the buffer circuit is coupled to the switching converter which senses the changing buffer circuit output current. The switching converter changes its duty cycle to oppose the current from the buffer circuit. This is a master-slave loop topology wherein the buffer circuit is the master loop that quickly provides high levels of current to compensate for a voltage transient at the output of the voltage regulator, and the switching converter is the slave loop which eventually takes over from the master loop to meet the current output requirements of the voltage regulator.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: October 10, 2000
    Assignee: Semtech Corporation
    Inventors: Eric X. Yang, Lajos Burgyan, Prabhjyot S. Bhurji
  • Patent number: 6046581
    Abstract: A load emulator provides a high current load having a specified high slew rate to replicate the load and transient currents generated by advanced high speed microprocessors. The load emulator is implemented in the form of an L-C delay line having taps between separate load stages wherein each of the load stages provides a load which forms a portion of the total load in the load emulator. The load emulator, can achieve and exceed a current slew rate of 1 ampere per nanosecond, and can achieve and exceed a load current of 50 amperes.
    Type: Grant
    Filed: May 28, 1999
    Date of Patent: April 4, 2000
    Assignee: Semtech Corporation
    Inventor: Lajos Burgyan
  • Patent number: 4924473
    Abstract: A laser diode protection circuit includes an input connected to receive the RF amplitude modulating signal. A second RF amplifier is connected to amplify the received RF amplitude modulating signal and to put out an amplified signal. A sensing element such as differential amplifier or Schmitt trigger is connected to put out a control signal when the amplified signal exceeds in amplitude a reference level. A switching element preferably includes a series PIN diode network having a PIN diode connected in parallel in reverse conduction order across the laser diode. The switching arrangement is responsive to the control signal and effectively swamps or diverts the forward conduction current away from the laser diode thereby causing it to become reverse biased.
    Type: Grant
    Filed: March 28, 1989
    Date of Patent: May 8, 1990
    Assignee: Raynet Corporation
    Inventors: Lajos Burgyan, Wilfred L. Hand
  • Patent number: 4625246
    Abstract: Circuit means for recorders in which the same external pin receives a play signal, a record signal, and a noise reduction signal generated by a user. The circuit means is comprised of a differentiating means for receiving the play and record signals and differentiating between them. A memory means is connected to the differentiating means and stores an indication of the last received of the signals. A first switch means is connected to the memory means and is operable to a first condition to control the play function when the memory means indicates the play signal was last received and to a second condition to control the record function when the memory means indicates the record signal was last received. A second switch means is connected to the external pin receiving the noise reduction signal and generating an ouptut signal to turn on noise reduction means during either the play or record mode.
    Type: Grant
    Filed: March 27, 1984
    Date of Patent: November 25, 1986
    Assignee: Signetics Corporation
    Inventor: Lajos Burgyan
  • Patent number: 4524330
    Abstract: A bipolar differential amplifying circuit contains a pair of input transistors (3 and 4) for receiving a differential input signal, a pair of differentially-configured first and second transistor circuits (5 and 6) coupled to the input transistors, and a subtracting circuit (11 and 12) for comparing the sum of the currents through first collectors (5C.sub.1 and 6C.sub.1) of the transistor circuits with the current through a second collector (6C.sub.2) of the second transistor circuit to generate an output signal representative of the input signal. A PN diode (13) is coupled to a second collector (5C.sub.2) of the first transistor circuit. The voltages at the collectors are very close, thereby yielding a high common-mode rejection ratio for the input signal.
    Type: Grant
    Filed: September 1, 1983
    Date of Patent: June 18, 1985
    Assignee: Signetics Corporation
    Inventor: Lajos Burgyan
  • Patent number: 4190819
    Abstract: A motor vehicle information system having a programmable automotive tape recorder that can automatically deliver sequential prerecorded messages concerning road information and the like at predetermined intervals. An electromechanical adaptor connected to the odometer system of the vehicle provides pulses that are proportional to the distance traveled and these pulses are fed into a microprocessor which performs arithmetic and logic functions to drive a tape recorder with prerecorded messages. The system permits the distance data for programming the microprocessor and the related sequential messages to be stored directly on the tape such as a prerecorded casesette or for the distance data to be stored in the memory of the microprocessor with the sequential messages on the tape only.
    Type: Grant
    Filed: January 31, 1977
    Date of Patent: February 26, 1980
    Assignee: Michael J. Femal
    Inventor: Lajos Burgyan
  • Patent number: 4056685
    Abstract: A signal distributing and muting system for a four-channel stereo receiver comprises a source of composite baseband signal, a source of bias potential and a plurality of differential amplifier type demodulators for developing a like plurality of audio difference components. The system includes a composite signal distributor having a first output terminal for applying composite signal to one of the demodulators and a second output terminal for applying composite signal for the remaining ones of the demodulators. A bias potential distributor has a first output terminal for applying operating bias to one demodulator and a second output terminal for applying operating bias to the remaining ones of the demodulators. A control signal is provided which has a first amplitude indicative of detection by the receiver of a four-channel pilot signal and a second different amplitude indicative of failure to detect such a pilot signal.
    Type: Grant
    Filed: December 29, 1976
    Date of Patent: November 1, 1977
    Assignee: Zenith Radio Corporation
    Inventor: Lajos Burgyan