Patents by Inventor Lakshminarasimhan Sethumadhavan
Lakshminarasimhan Sethumadhavan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11947663Abstract: Disclosed are methods, systems, devices, media, circuits, and other implementations, including a method that includes generating for a code block of a process executing on a controller-based device one or more code block copies defined in a virtual address space of the controller-based device, with the code block of the process being stored in a particular segment of a physical address space of the controller-based device, and with the code block configured to separately map to each of the one or more of the code block copies in the virtual address space. The method further includes processing at least a portion of one of the one or more code block copies defined in the virtual address space when the corresponding code block of the process is to be processed.Type: GrantFiled: September 24, 2020Date of Patent: April 2, 2024Assignee: The Trustees of Columbia University in the City of New YorkInventors: Lakshminarasimhan Sethumadhavan, Miguel Arroyo, Mohamed Tarek Bnziad Mohamed Hassan, Evgeny Manzhosov
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Patent number: 11841966Abstract: Disclosed are devices, systems, apparatus, methods, products, and other implementations, including a method that includes determining whether an operation to access a memory location containing executable code comprises a general-purpose memory access operation, and changing content of the memory location in response to a determination that the operation to access the memory location containing the executable code comprises the general-purpose memory access operation to the memory location.Type: GrantFiled: December 14, 2021Date of Patent: December 12, 2023Assignee: The Trustees of Columbia University in the City of New YorkInventors: Adrian Tang, Salvatore Stolfo, Lakshminarasimhan Sethumadhavan
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Publication number: 20220413959Abstract: Disclosed are methods, systems, devices, circuits. and other implementations, including a method for error identification and correction that includes obtaining from a memory device coded input data, the coded input data previously encoded by multiplying a source data element by a pre-determined multiplier, and stored in the memory device, and performing a decoding operation on the coded input data obtained from the memory device, with the decoding operation including at least a modulo operation, to derive a resultant decoded data element and a remainder portion. The method further includes determining whether the coded input data includes a corrupted portion based on a value of the remainder portion.Type: ApplicationFiled: June 23, 2022Publication date: December 29, 2022Inventors: Lakshminarasimhan Sethumadhavan, Evgeny Manzhosov
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Patent number: 11500785Abstract: Disclosed are devices, systems, apparatus, circuits, methods, products, and other implementations, including a method that includes obtaining, during execution of a process associated with a particular privilege level, data content from a memory location, and determining by a hardware-based detection circuit whether the data content matches at least one of one or more token values, with the one or more token values stored in one or more pre-determined memory locations, and with access of any of the pre-determined one or more memory locations indicating a potential anomalous condition. The method further includes triggering, in response to a determination that the data content matches the at least one of the one or more token values, another process with a higher or same privilege level as the particular privilege level associated with the process, to handle occurrence of a potential system violation condition.Type: GrantFiled: September 7, 2018Date of Patent: November 15, 2022Assignee: The Trustees of Columbia University in the City of New YorkInventors: Lakshminarasimhan Sethumadhavan, Kanad Sinha
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Publication number: 20220284115Abstract: Disclosed are devices, systems, apparatus, methods, products, and other implementations, including a method that includes determining whether an operation to access a memory location containing executable code comprises a general-purpose memory access operation, and changing content of the memory location in response to a determination that the operation to access the memory location containing the executable code comprises the general-purpose memory access operation to the memory location.Type: ApplicationFiled: December 14, 2021Publication date: September 8, 2022Inventors: Adrian Tang, Salvatore Stolfo, Lakshminarasimhan Sethumadhavan
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Publication number: 20220019657Abstract: Disclosed are methods, systems, devices, media, circuits, and other implementations, including a method that includes generating for a code block of a process executing on a controller-based device one or more code block copies defined in a virtual address space of the controller-based device, with the code block of the process being stored in a particular segment of a physical address space of the controller-based device, and with the code block configured to separately map to each of the one or more of the code block copies in the virtual address space. The method further includes processing at least a portion of one of the one or more code block copies defined in the virtual address space when the corresponding code block of the process is to be processed.Type: ApplicationFiled: September 24, 2020Publication date: January 20, 2022Inventors: Lakshminarasimhan Sethumadhavan, Miguel Arroyo, Mohamed Tarek Bnziad Mohamed Hassan, Evgeny Manzhosov
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Patent number: 11227056Abstract: Disclosed are devices, systems, apparatus, methods, products, and other implementations, including a method that includes determining whether an operation to access a memory location containing executable code comprises a general-purpose memory access operation, and changing content of the memory location in response to a determination that the operation to access the memory location containing the executable code comprises the general-purpose memory access operation to the memory location.Type: GrantFiled: August 4, 2016Date of Patent: January 18, 2022Assignee: The Trustees of Columbia University in the City of New YorkInventors: Adrian Tang, Salvatore Stolfo, Lakshminarasimhan Sethumadhavan
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Publication number: 20200233591Abstract: Disclosed are devices, methods, systems, media, and other implementations that include a method comprising accessing during execution of a process a memory element, determining whether data stored in the accessed memory element includes security data representative of locations that, if accessed, indicate a potential system violation condition, determining, in response to a determination that the accessed memory element includes the security data, whether execution of the process involves access of one or more memory locations in the accessed memory element containing the security data, and performing one or more remedial actions in response to a determination that the one or more memory locations in the memory element containing the security data are being accessed.Type: ApplicationFiled: January 16, 2020Publication date: July 23, 2020Inventors: Lakshminarasimhan Sethumadhavan, Hiroshi Sasaki, Mohamed Tarek Bnziad Moha Hassan, Miguel Angel Arroyo
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Patent number: 10599847Abstract: Disclosed are devices, systems, apparatus, methods, products, media and other implementations, including a method that includes triggering a beacon circuit combined with a hardware-based protection module, included within a hardware device, the hardware-based protection module configured to provide protection against malicious implementations within the hardware device, with the beacon circuit being configured to provide a beacon output when triggered. The method further includes determining based on the beacon output provided by the triggered beacon circuit whether the hardware device includes at least one malicious implementation.Type: GrantFiled: July 20, 2018Date of Patent: March 24, 2020Assignee: The Trustees of Columbia University in the City of New YorkInventors: Lakshminarasimhan Sethumadhavan, Adam Waksman
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Publication number: 20200026665Abstract: Disclosed are devices, systems, apparatus, circuits, methods, products, and other implementations, including a method that includes obtaining, during execution of a process associated with a particular privilege level, data content from a memory location, and determining by a hardware-based detection circuit whether the data content matches at least one of one or more token values, with the one or more token values stored in one or more pre-determined memory locations, and with access of any of the pre-determined one or more memory locations indicating a potential anomalous condition. The method further includes triggering, in response to a determination that the data content matches the at least one of the one or more token values, another process with a higher or same privilege level as the particular privilege level associated with the process, to handle occurrence of a potential system violation condition.Type: ApplicationFiled: September 7, 2018Publication date: January 23, 2020Inventors: Lakshminarasimhan Sethumadhavan, Kanad Sinha
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Patent number: 10459704Abstract: Disclosed are devices, systems, apparatus, methods, products, media, and other implementations, including a method that includes generating for a code segment of a first process an instruction dependency graph representative of behavior of the first process, obtaining respective one or more instruction dependency graphs representative of behaviors of code segments for one or more other processes, and determining, based on the first instruction dependency graph for the first process and the respective one or more instruction dependency graphs for the one or more other processes, a level of similarity between the first process and at least one of the one or more other processes.Type: GrantFiled: February 8, 2016Date of Patent: October 29, 2019Assignee: The Trustees of Columbia University in the City of New YorkInventors: Fang-hsiang Su, Lakshminarasimhan Sethumadhavan, Gail E. Kaiser, Tony Jebara
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Patent number: 10417425Abstract: Disclosed are devices, systems, apparatus, methods, products, and other implementations, including a method that includes causing at least one reset for one or more components of a cyber-physical system, the cyber-physical system including a mechanical apparatus with at least one of a mechanical input or a mechanical output, and at least one controller to control operations of at least one of the mechanical apparatus and inhibit computing-based attacks on the cyber-physical system. The method further includes determining, upon resumption of operation of the cyber-physical system following the at least one reset, a post-reset state of the one or more components of the cyber-physical system based, at least in part, on mechanical attributes of the mechanical apparatus following the at least one reset resulting from inertia of the mechanical apparatus during the at least one reset.Type: GrantFiled: June 8, 2017Date of Patent: September 17, 2019Assignee: The Trustees of Columbia University in the City of New YorkInventors: Miguel A. Arroyo, Lakshminarasimhan Sethumadhavan, Jonathan Weisz
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Publication number: 20190213331Abstract: Disclosed are devices, systems, apparatus, methods, products, media and other implementations, including a method that includes triggering a beacon circuit combined with a hardware-based protection module, included within a hardware device, the hardware-based protection module configured to provide protection against malicious implementations within the hardware device, with the beacon circuit being configured to provide a beacon output when triggered. The method further includes determining based on the beacon output provided by the triggered beacon circuit whether the hardware device includes at least one malicious implementation.Type: ApplicationFiled: July 20, 2018Publication date: July 11, 2019Inventors: Lakshminarasimhan SETHUMADHAVAN, Adam WAKSMAN
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Patent number: 10237059Abstract: Disclosed are devices, systems, apparatus, methods, products, and other implementations, including a method that includes receiving a block of information from non-processor memory at an interface between the non-processor memory and processor memory comprising two or more processor memory levels, determining whether the block of information received from the non-processor memory at the interface corresponds to encrypted instruction code, and decrypting the block of information at the interface between the non-processor memory and the processor memory for storage in one of the two or more levels of the processor memory in response to a determination that the received block of information corresponds to the encrypted instruction code. The block of information is stored at the one of the two or more levels of the processor memory without being decrypted when the received block of information is determined to correspond to data.Type: GrantFiled: November 20, 2015Date of Patent: March 19, 2019Assignee: The Trustees of Columbia University in the City of New YorkInventors: Lakshminarasimhan Sethumadhavan, Kanad Sinha, Angelos Keromytis, Vasileios Pappas, Vasileios Kemerlis
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Publication number: 20180300484Abstract: Disclosed are devices, systems, apparatus, methods, products, media and other implementations, including a method that includes obtaining hardware-based micro-architectural data, including hardware-based micro-architectural counter data, for a hardware device executing one or more processes, and determining based, at least in part, on the hardware-based micro-architectural data whether at least one of the one or more processes executing on the hardware device corresponds to a malicious process. In some embodiments, determining based on the hardware-based micro-architectural data whether the at least one of the one or more processes corresponds to a malicious process may include applying one or more machine-learning procedures to the hardware-based micro-architectural data to determine whether the at least one of the one or more processes corresponds to the malicious process.Type: ApplicationFiled: June 14, 2018Publication date: October 18, 2018Inventors: Lakshminarasimhan Sethumadhavan, John Demme, Jared Schmitz, Adrian Tang, Sal Stolfo, Matthew Maycock
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Publication number: 20180268142Abstract: Disclosed are devices, systems, apparatus, methods, products, media and other implementations, including a method that includes obtaining current hardware performance data, including hardware performance counter data, for a hardware device executing a first process associated with pre-recorded hardware performance data representative of the first process' normal behavior, and determining whether a malicious process is affecting performance of the first process based on a determination of an extent of deviation of the obtained current hardware performance data corresponding to the first process from the pre-recorded hardware performance data representative of the normal behavior of the first process.Type: ApplicationFiled: May 17, 2018Publication date: September 20, 2018Inventors: Lakshminarasimhan Sethumadhavan, Adrian TANG, Salvatore STOLFO
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Publication number: 20180247069Abstract: Disclosed are devices, systems, apparatus, methods, products, and other implementations, including a method that includes determining whether an operation to access a memory location containing executable code comprises a general-purpose memory access operation, and changing content of the memory location in response to a determination that the operation to access the memory location containing the executable code comprises the general-purpose memory access operation to the memory location.Type: ApplicationFiled: August 4, 2016Publication date: August 30, 2018Inventors: Adrian Tang, Salvatore Stolfo, Lakshminarasimhan Sethumadhavan
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Patent number: 10055587Abstract: Disclosed are devices, systems, apparatus, methods, products, media and other implementations, including a method that includes triggering a beacon circuit combined with a hardware-based protection module, included within a hardware device, the hardware-based protection module configured to provide protection against malicious implementations within the hardware device, with the beacon circuit being configured to provide a beacon output when triggered. The method further includes determining based on the beacon output provided by the triggered beacon circuit whether the hardware device includes at least one malicious implementation.Type: GrantFiled: December 19, 2014Date of Patent: August 21, 2018Assignee: The Trustees of Columbia University in the City of New YorkInventors: Lakshminarasimhan Sethumadhavan, Adam Waksman
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Patent number: 10025929Abstract: Disclosed are devices, systems, apparatus, methods, products, media and other implementations, including a method that includes obtaining hardware-based micro-architectural data, including hardware-based micro-architectural counter data, for a hardware device executing one or more processes, and determining based, at least in part, on the hardware-based micro-architectural data whether at least one of the one or more processes executing on the hardware device corresponds to a malicious process. In some embodiments, determining based on the hardware-based micro-architectural data whether the at least one of the one or more processes corresponds to a malicious process may include applying one or more machine-learning procedures to the hardware-based micro-architectural data to determine whether the at least one of the one or more processes corresponds to the malicious process.Type: GrantFiled: November 5, 2013Date of Patent: July 17, 2018Assignee: The Trustees of Columbia University in the City of New YorkInventors: Lakshminarasimhan Sethumadhavan, John Demme, Jared Schmitz, Adrian Tang, Sal Stolfo, Matthew Maycock
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Patent number: 9996694Abstract: Disclosed are devices, systems, apparatus, methods, products, media and other implementations, including a method that includes obtaining current hardware performance data, including hardware performance counter data, for a hardware device executing a first process associated with pre-recorded hardware performance data representative of the first process' normal behavior, and determining whether a malicious process is affecting performance of the first process based on a determination of an extent of deviation of the obtained current hardware performance data corresponding to the first process from the pre-recorded hardware performance data representative of the normal behavior of the first process.Type: GrantFiled: March 14, 2014Date of Patent: June 12, 2018Assignee: The Trustees of Columbia University in the City of New YorkInventors: Lakshminarasimhan Sethumadhavan, Adrian Tang, Salvatore Stolfo