Abstract: A very large scale integrated circuit comprises a number of function blocks which are synchronized by relevant clock signals. Each function block forms an isochronous region so that the delay times of the signals within the relevant function block can be negligibly small with respect to the gate delay times. Each function block is paired with at least one other function block in that the pair is connected by an information connection and by at least two synchronization handshake lines for transporting synchronization signals dispatched by each function block of the pair to the other function block of the pair so that an asynchronous information transport is obtained. One or more of the function blocks comprises an information connection to the environment. As a result of this set-up, the circuit can also be tested and designed per function block.

Abstract: A system for supplying power to and switching a number of electrical appliances each having a power consuming part and a switching part, each switching part having a unique address. A signal line is coupled to each of the switching parts, to a clock pulse generator and to individual signal transmitters, each transmitter corresponding to one switching part, for generating a control signal for addressing its corresponding switching part. The signal transmitters, when activated, generate a characteristic control signal in synchronism with the clock pulses from the clock pulse generator. No central encoder is required for controlling the individual electrical appliances. Rather, it is necessary only to activate the particular signal transmitter associated with the particular appliance.