Abstract: Method for control protocol frame transmission and electronic device are provided. The method comprises following operations. By the electronic device operating in an advanced line encoding mode and having a first burst from the electronic device to the other electronic device, the first burst is closed and a second burst is opened from the electronic device to the other electronic device for request frame transmission, wherein the electronic device operating in the advanced line encoding mode is configured to transmit data by using an advanced line encoding having an effective data rate larger than an effective data rate of 8b/10b encoding. By the electronic device, a request frame is transmitted in the second burst.

Abstract: A method for information configuration in power mode change for an interconnection protocol, a controller, and a storage device. The method can be used in a first device capable of linking to a second device according to the interconnection protocol. The method includes: while a hardware protocol engine of the first device for implementing a protocol layer of the interconnection protocol performs power mode change according to the protocol layer, generating a configuration indication signal to trigger a piece of firmware of the first device for performing information configuration for a physical layer of the interconnection protocol; in response to the configuration indication signal, performing the information configuration for the physical layer by the piece of firmware; and upon completion of the information configuration for the physical layer, informing, by the piece of firmware, the hardware protocol engine of the completion of the information configuration.

Abstract: A method for error handling of an interconnection protocol, a controller and a storage device are provided. The method for error handling of an interconnection protocol is for use in a first device that is linkable to a second device according to the interconnection protocol, the method comprising: during or after a power mode change of a link between the first device and the second device: a) triggering, by the first device, a first line reset signal to the second device; b) performing, by the first device, suppression of detected rate overlap errors; and c) stopping the suppression of detected rate overlap errors after the first device receives a second line reset signal from the second device.

Abstract: A method for error handling of an interconnection protocol, a controller and a storage device are provided. The method for error handling of an interconnection protocol is for use in a first device that is linkable to a second device according to the interconnection protocol, the method comprising: during or after a power mode change of a link between the first device and the second device: a) triggering, by the first device, a first line reset signal to the second device; b) performing, by the first device, suppression of detected rate overlap errors; and c) stopping the suppression of detected rate overlap errors after the first device receives a second line reset signal from the second device.

Abstract: A clock generating device, a controller and a storage device. The clock generating device comprises: a clock generator counter outputting a clock trigger signal according to a clock period of each reference number of a reference clock; a compensation counter module outputting a compensation signal, the compensation counter module comprises: a first compensation counter outputting a first compensation clock according to a clock period of each first compensation number of the reference clock, the first compensation number is greater than the reference number, the compensation signal includes the first compensation clock; and a clock generator, when the compensation signal is in a first state, the clock generator generates a target clock signal according to the clock trigger signal; when the compensation signal is in a second state, the clock generator cancels a corresponding pulse in the clock trigger signal according to the compensation signal to generate the target clock signal.

Abstract: A method for information configuration in power mode change for an interconnection protocol, a controller, and a storage device. The method can be used in a first device capable of linking to a second device according to the interconnection protocol. The method includes: while a hardware protocol engine of the first device for implementing a protocol layer of the interconnection protocol performs power mode change according to the protocol layer, generating a configuration indication signal to trigger a piece of firmware of the first device for performing information configuration for a physical layer of the interconnection protocol; in response to the configuration indication signal, performing the information configuration for the physical layer by the piece of firmware; and upon completion of the information configuration for the physical layer, informing, by the piece of firmware, the hardware protocol engine of the completion of the information configuration.

Abstract: A system and method for forwarding data packets with quality of service and rate control. A plurality of data packets are received from a plurality of sources. The header information of each data packet is extracted and compared against a plurality of tables, and then new header information is assembled based upon the comparison results. The data packets have their headers replaced by the new header information on the fly before being sent to their destinations, or the new header information may be dropped if certain conditions are met.

Abstract: The present invention is to disclose a scheduler which comprising a priority tagging module for receiving a plurality of information chucks, a plurality of output lines, and a WRR (weighted round robin) module. In this regards, each information chucks are tagged with a priority tag by said priority tagging module according to a priority classification scheme. In addition, the WRR module further comprises a bucket list, which has a plurality of buckets, and a control module. Each bucket stores a ticket, which comprises an identification representing one of the plurality of output lines and an associated weight value of the represented output line. Besides, the control module receives the tagged information chucks from the priority tagging module and schedules the tagged information chucks into the plurality of output lines according to a scheduling scheme based on said bucket list.

Abstract: A system and method for forwarding data packets with quality of service and rate control. A plurality of data packets are received from a plurality of sources. The header information of each data packet is extracted and compared against a plurality of tables, and then new header information is assembled based upon the comparison results. The data packets have their headers replaced by the new header information on the fly before being sent to their destinations, or the new header information may be dropped if certain conditions are met.

Abstract: The present invention is to disclose a scheduler which comprising a priority tagging module for receiving a plurality of information chucks, a plurality of output lines, and a WRR (weighted round robin) module. In this regards, each information chucks are tagged with a priority tag by said priority tagging module according to a priority classification scheme. In addition, the WRR module further comprises a bucket list, which has a plurality of buckets, and a control module. Each bucket stores a ticket, which comprises an identification representing one of the plurality of output lines and an associated weight value of the represented output line. Besides, the control module receives the tagged information chucks from the priority tagging module and schedules the tagged information chucks into the plurality of output lines according to a scheduling scheme based on said bucket list.