Patents by Inventor Larren Gene Weber

Larren Gene Weber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020027480
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Application
    Filed: August 14, 2001
    Publication date: March 7, 2002
    Applicant: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Publication number: 20020017965
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Application
    Filed: August 14, 2001
    Publication date: February 14, 2002
    Applicant: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Publication number: 20020012416
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Application
    Filed: August 6, 2001
    Publication date: January 31, 2002
    Applicant: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Publication number: 20020000891
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Application
    Filed: June 25, 2001
    Publication date: January 3, 2002
    Applicant: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Patent number: 6292407
    Abstract: Improved methods and structures are provided that allow for the updating of output driver impedances for a circuit to match an impedance of the transmission line to which the circuit is coupled. In particular, improved methods and structures are provided which allow for a reliable updating of the output driver impedance without requiring the output driver to be tristated in order to prevent data loss. Embodiments of a method of forming an integrated circuit include coupling a data line to an enable input of a holding device. The method also includes coupling at least one impedance line to a data input of the holding device. The at least one impedance line carries an impedance update signal. Further, an impedance of the data line at a data output of the memory device is capable of being updated to a value equal to the impedance update signal when the data line is quiescent.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: September 18, 2001
    Assignee: Micron Technolgy, Inc.
    Inventors: John D. Porter, Larren Gene Weber
  • Publication number: 20010018647
    Abstract: A system and method for manipulating a netlist, at the time that the netlist is being created, to permit measurement of current flow through a net, or combination of nets, of a sub-circuit during a subsequent simulation process, the manipulation of the netlist including identifying nets through which current flow is to be measured, creating “artificial” nets for the identified nets, substituting the “artificial” nets for the identified nets in the netlist file, and connecting a power supply between the artificial net and the identified net for which it has been substituted.
    Type: Application
    Filed: May 8, 2001
    Publication date: August 30, 2001
    Applicant: Micron Technology, Inc.
    Inventor: Larren Gene Weber
  • Patent number: 6275119
    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.
    Type: Grant
    Filed: August 25, 1999
    Date of Patent: August 14, 2001
    Assignee: Micron Technology, Inc.
    Inventors: William N. Thompson, John D. Porter, Larren Gene Weber
  • Patent number: 6230301
    Abstract: A system and method for manipulating a netlist, at the time that the netlist is being created, to permit measurement of current flow through a net, or combination of nets, of a sub-circuit during a subsequent simulation process, the manipulation of the netlist including identifying nets through which current flow is to be measured, creating “artificial” nets for the identified nets, substituting the “artificial” nets for the identified nets in the netlist file, and connecting a power supply between the artificial net and the identified net for which it has been substituted.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: May 8, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Larren Gene Weber
  • Patent number: 6189134
    Abstract: A method and device for scoping global nets from a schematic in a flat netlist. The device is a complementary subsystem to a flat netlister software package. The device allows instances in a schematic to systematically reassign global nets to local nets so that the use of such nets does not affect usage of the global nets elsewhere in the circuit. The device tracks all global nets and maps the corresponding scoped nets to their net identifiers. Then, as the netlister creates the flat netlist, the device replaces the global net's net identifier with the correct net identifier of the corresponding scoped net.
    Type: Grant
    Filed: February 22, 1999
    Date of Patent: February 13, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Larren Gene Weber
  • Patent number: 6091079
    Abstract: A semiconductor wafer testing fixture facilitates burn-in testing of multiple wafers, whereby individual wafers have an array of individual die or integrated circuit chips with their own test circuitry. The wafer has Vcc and Vss buses provided thereon which are coupled to the individual integrated circuit chips and test circuitry. The fixture has a housing sized to accommodate multiple semiconductor wafers in a selected orientation. The wafers are supported within the housing on corresponding shelves, which provides a back bias voltage to the wafer. The fixture has first and second conductive arms for supplying selected voltages to the Vcc and Vss buses for imparting test cycling of the integrated circuits. The first arm has multiple hands which engage the Vcc buses on the wafers supported on corresponding shelves. Likewise, the second arm has multiple second hands which engage the Vss buses on the wafers supported on corresponding shelves.
    Type: Grant
    Filed: August 2, 1996
    Date of Patent: July 18, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Robert Sherman Green, Larren Gene Weber
  • Patent number: 6009249
    Abstract: A method and device for automatically generating load circuits for a netlist. A computer system having a schematic for a circuit is used to create a netlist. While constructing the netlist, instances are checked for directives. The directives indicate that the instance should be tracked as a load circuit. For the instances having such a directive, their nets are flagged and the hierarchal portion of the circuit attached to the flagged nets is flattened. The resulting flat circuit replaces the instance in the netlist as a load circuit.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: December 28, 1999
    Assignee: Micron Technology, Inc.
    Inventor: Larren Gene Weber
  • Patent number: 5946218
    Abstract: A method and system for changing the connected behavior of a circuit design schematic at the time a netlist is being created by assigning instance parameters to each switch instance, the parameter having a value representing that the position of the switch is open or closed, the parameter being evaluated at the time the netlist is created to determine the position of the switch. When the netlist being created is a flat netlist, a closed switch condition is represented by printing information to the netlist file that identifies the nets being interconnected. When the netlist being created is a hierarchical netlist, the nets being interconnected are declared as "artificial" ports, allowing these nets to be tracked through the hierarchy to instances at which the parameters are evaluated and to provide a connection between these nets, allowing the interconnection of nets to be specified at a level in the hierarchy other than that at which the switch is declared.
    Type: Grant
    Filed: September 2, 1998
    Date of Patent: August 31, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Ronald L. Taylor, Larren Gene Weber
  • Patent number: 5901064
    Abstract: A method and device for scoping nets from a schematic in a hierarchical netlist. The device is a complementary subsystem to a hierarchical netlister software package. The device allows instances or subcircuits in a schematic to systematically reassign (i.e., scope) local nets which represent global nets to other local nets so that the use of such nets does not affect usage of the global nets elsewhere in the circuit. The device tracks all global nets and maps the corresponding scoped nets to their net identifiers. Then, as the netlister creates the hierarchical netlist, the device replaces the global net's net identifier with the correct net identifier of the corresponding scoped net.
    Type: Grant
    Filed: August 6, 1996
    Date of Patent: May 4, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Larren Gene Weber, Ronald L. Taylor
  • Patent number: 5875115
    Abstract: A method and device for scoping global nets from a schematic in a flat netlist. The device is a complementary subsystem to a flat netlister software package. The device allows instances in a schematic to systematically reassign global nets to local nets so that the use of such nets does not affect usage of the global nets elsewhere in the circuit. The device tracks all global nets and maps the corresponding scoped nets to their net identifiers. Then, as the netlister creates the flat netlist, the device replaces the global net's net identifier with the correct net identifier of the corresponding scoped net.
    Type: Grant
    Filed: August 6, 1996
    Date of Patent: February 23, 1999
    Assignee: Micron Technology, Inc.
    Inventor: Larren Gene Weber
  • Patent number: 5815402
    Abstract: A method and system for changing the connected behavior of a circuit design schematic at the time a netlist is being created by assigning instance parameters to each switch instance, the parameter having a value representing that the position of the switch is open or closed, the parameter being evaluated at the time the netlist is created to determine the position of the switch. When the netlist being created is a flat netlist, a closed switch condition is represented by printing information to the netlist file that identifies the nets being interconnected. When the netlist being created is a hierarchical netlist, the nets being interconnected are declared as "artificial" ports, allowing these nets to be tracked through the hierarchy to instances at which the parameters are evaluated and to provide a connection between these nets, allowing the interconnection of nets to be specified at a level in the hierarchy other than that at which the switch is declared.
    Type: Grant
    Filed: June 7, 1996
    Date of Patent: September 29, 1998
    Assignee: Micron Technology, Inc.
    Inventors: Ronald L. Taylor, Larren Gene Weber
  • Patent number: 5808896
    Abstract: A system and method for manipulating a netlist, at the time that the netlist is being created, to permit measurement of current flow through a net, or combination of nets, of a sub-circuit during a subsequent simulation process, the manipulation of the netlist including identifying nets through which current flow is to be measured, creating "artificial" nets for the identified nets, substituting the "artificial" nets for the identified nets in the netlist file, and connecting a power supply between the artificial net and the identified net for which it has been substituted.
    Type: Grant
    Filed: June 10, 1996
    Date of Patent: September 15, 1998
    Assignee: Micron Technology, Inc.
    Inventor: Larren Gene Weber