Abstract: Semiconductor wafers within a supporting vertical wafer tower are positioned within a vertical process chamber through a lower gate valve fixed to a supporting framework. The gate valve is sealed to a similar gate valve at the upper end of a movable load lock on the framework, within which the wafers are subjected to pre-treatment and post-treatment processes. Two load locks are alternately used in conjunction with the process chamber and a wafer loading station on the framework. In addition, a cleaning element is movably mounted on the framework for periodically maintaining the interior surfaces of the process tube within the process chamber.

Abstract: An integrated circuit test site assembly for testing pin grid array (PGA) packaged integrated circuits having removable contact pins. The removable contact pins, which are preferably spring-loaded pogo pins, enable the test site assembly to be repaired quickly and easily with a minimum of down time. In addition, the test site need only be loaded with the number of pins required to make contact with the PGA lead pattern.