Abstract: An apparatus to initialize a port includes a first input-output port to connect to a first device and a control unit to initialize all input-output ports of the apparatus when the apparatus is booted and to skip a power-on self-test (POST) of the first input-output port in response to a request to skip initialization of the first input-output port while the first input-output port is enabled.

Abstract: An apparatus to initialize a port includes a first input-output port to connect to a first device and a control unit to initialize all input-output ports of the apparatus when the apparatus is booted and to skip a power-on self-test (POST) of the first input-output port in response to a request to skip initialization of the first input-output port while the first input-output port is enabled.

Abstract: An apparatus to initialize a port includes a first input-output port to connect to a first device and a control unit to initialize all input-output ports of the apparatus when the apparatus is booted and to skip a power-on self-test (POST) of the first input-output port in response to a request to skip initialization of the first input-output port while the first input-output port is enabled.

Abstract: Example implementations relate to serial port pin voltages. For example, an apparatus includes a first input device to receive a first input based on a setting, a second input device to receive a second input based on the setting, and a third input device to receive a third input based on the setting. The apparatus also includes a circuit coupled to the first input device, the second input device, and the third input device. In response to the first input, the second input, and the third input, the circuit is to provide a first voltage to a first pin of a serial port and a second voltage to a second pin of the serial port. The first voltage and the second voltage are defined by the setting.

Abstract: A system is disclosed that includes memory resources and one or more processing components coupled to the one or more memory resources. At least one of the memory resources stores a basic input/output system (BIOS). The one or more processing components are coupled to the memory resources to run a program for operating a point-of-sale (POS) terminal. The program enables a user to provide an input to open a cash drawer. A controller circuit receives a signal from the BIOS when the user provides the input and generates a pulse signal having a predetermined duration to cause a voltage signal to be transmitted to a solenoid of the cash drawer. The voltage signal causes the solenoid to change states in order to open the cash drawer.

Abstract: An apparatus to initialize a port includes a first input-output port to connect to a first device and, a control unit to initialize all input-output ports of the apparatus when the apparatus is booted and to skip a power-on self-test (POST) of the first input-output port in response to a request to skip initialization of the first input-output port while the first input-output port is enabled.

Abstract: A computer monitors a connected state of a cash drawer and the open/closed status of one or more trays by way of circuitry and a BIOS program code. The computer opens the respective trays of the cash drawer by way of the circuitry and the BIOS program code. Alert messaging or alarm functions can also be performed in accordance with the monitoring. Cash drawer security, management and user convenience are improved accordingly.

Abstract: Access to a cash drawer is controlled by way of a basic input-output system (BIOS) of an associated computer. The BIOS can provide for local user access to the cash drawer by way of password, designated keystroke, or other procedure. A local or remote user can reconfigure cash drawer access procedures, establish time clock-based scheduling, or affect other control parameters by way of graphical user interface (GUI) stored in the BIOS. Cash drawer security, management options and user convenience are improved accordingly.

Abstract: A system is disclosed that includes memory resources and one or more processing components coupled to the one or more memory resources. At least one of the memory resources stores a basic input/output system (BIOS). The one or more processing components are coupled to the memory resources to run a program for operating a point-of-sale (POS) terminal. The program enables a user to provide an input to open a cash drawer. A controller circuit receives a signal from the BIOS when the user provides the input and generates a pulse signal having a predetermined duration to cause a voltage signal to be transmitted to a solenoid of the cash drawer. The voltage signal causes the solenoid to change states in order to open the cash drawer.

Abstract: Systems, methodologies, media and other embodiments associated with configuring a port are described. One exemplary system embodiment includes a computing system that includes a port configured to operably connect an external device to the computing system. The example system may also include a mode controller operably connected to the port and that is configured to configure the port between a powered mode and a non-powered mode in accordance with a programmatically selected port configuration.

Abstract: A computer system having first and second low power states includes a controller (such as a BIOS routine) that can generate a request to transition to the first low power state (e.g., Suspend state defined in the Advanced Power Management or APM. Standard) in response to activation of predefined events (e.g., a time-out event or a user-initiated event). A program receiving the request can deny the request and instead causes the system to transition to a second low power state (e.g., the APM Standby state).

Abstract: A computer system allows resuming from Power-On Suspend (POS) mode by generating an interrupt. The interrupt generates a System Management Interrupt (SMI), which a controller uses to produce a POS resume event signal to resume the system from the Power-On Suspend mode. The system allows use of chipsets such as the VIA VT82C586B that are incapable of directly causing a resume from POS mode in response to an interrupt.

Abstract: A method for aiding use of a computer includes receiving a home base signal, and in response to the home base signal, transferring control of the computer to a user home base application.

Abstract: Method and apparatus of controlling a power state of a computer, the computer being connected to a monitor having a power control button. The computer is connected to the monitor over a video cable, and activation of the power control button is communicated to the computer over a wire in the video cable. In response to the activation signal, a system management interrupt is generated to invoke an SMI handler to change the power state of the computer. The power states of the computer include an ON state, an intermediate power state (such as Sleep state), and a suspend state (such as Soft-Off state).

Abstract: A volume control handler allows users to dynamically alter the volume level of an audio device when the device is under control of a DOS mode application. The dynamic volume adjustment is performed without pausing or halting the DOS mode application. A system incorporating the volume control handler allows users of DOS mode applications to control a device's volume output in a manner similar to that provided by WINDOWS-compliant applications.

Abstract: The invention is a computer interface with a hardwired button array on the computer chassis for simulating the apparatus of common consumer electronic devices. Each button of the array of buttons is connected to at least two wires, with the depression of a button causing an electrical connection between the corresponding two wires. The voltage on one of these wires is forced to a steady-state logic low, while the voltage on the other wire is allowed to float electrically free. Nonetheless, the second wire is at a steady-state high voltage due to that wire's connection through a pull-up resistor to a voltage source. Upon electrical connection, the wire that is floating free acquires a logic low voltage. In response, a line state detector sends an interrupt signal to a microprocessor, which transitions the voltage on the wires forced to a steady-state logic low from a logic low to a free floating state.

Abstract: The invention is a computer system with a button array on the computer chassis for simulating the operation of common consumer electronic devices. Each button of the array of buttons is hardwired to the system processor. Upon activation of one of these buttons, an interrupt signal is sent to the system processor. The system processor halts whatever it is doing, and subsequently identifies the activated button. A signal generator attached to the buttons then sends the system processor a second interrupt signal, such that upon exiting the handling of the first interrupt, the system processor is presented with a second interrupt. The system processor then handles the second interrupt. While handling this second interrupt, the system processor executes whatever function corresponds to the activated button. The system processor then exits the handling of the second interrupt and resumes whatever activity it was engaged in before the activation of the button.