Abstract: A multilayer PCB (160) for optical transmission is presented. The multilayer PCB includes a first layer (1510), a second layer (1520), and a transparent layer (212) between them. The transparent layer may have a first compartment (1851), which may have a first mirror (214) operable to reflect a beam of light (260B) into the first compartment of the transparent layer in a plurality of directions (260C) perpendicular to the direction of the beam of light, thereby transmitting throughout the first compartment an optical signal carried by the beam of light in said plurality of directions such that one or more other mirrors disposed in the first compartment of the transparent layer are able to receive a beam of reflected light (260C) carrying the optical signal. The multilayer PCB may further include a second mirror (1508) in the first compartment for reflecting a wave of reflected light (260C) carrying the optical signal toward an optical receiver (1705).

Abstract: A multilayer PCB (160) for optical transmission is presented. The multilayer PCB includes a first layer (1510), a second layer (1520), and a transparent layer (212) between them. The transparent layer may have a first compartment (1851), which may have a first mirror (214) operable to reflect a beam of light (260B) into the first compartment of the transparent layer in a plurality of directions (260C) perpendicular to the direction of the beam of light, thereby transmitting throughout the first compartment an optical signal carried by the beam of light in said plurality of directions such that one or more other mirrors disposed in the first compartment of the transparent layer are able to receive a beam of reflected light (260C) carrying the optical signal. The multilayer PCB may further include a second mirror (1508) in the first compartment for reflecting a wave of reflected light (260C) carrying the optical signal toward an optical receiver (1705).

Abstract: A system and method for supporting tracking of data values of original source code at execution of a translated target version of the source code on a computer system. The system associates references to target data value containers in the target code with corresponding address information of original data value containers of the source code during program code translation. The system also stores, at execution of the target code, information related to target code instructions together with associated address information of original data value containers of the source code to uphold a data value view of the original source code.

Abstract: The read latency caused by job start preparation of a future job is at least partly hidden within the current job by reading information for job start preparation of the future job integrated with the execution of the current job. Instructions for job start preparation are preferably instrumented (701) into the current job and executed (702), whenever possible, in parallel with the instructions of the current job. The integrated job start preparation may include table look-ups, register file updating, instruction fetching and preparation. If the scheduled job order is allowed to change during execution, it is typically necessary to test (703) whether the next job is still valid before starting the execution, it is typically necessary to test (703) whether the next job is still valid before starting the execution of the next job and take appropriate actions (704; 705, 706) depending on the outcome of the test.

Abstract: he invention concerns the general data value problem, and especially the residence problem in a computer system when executing program code translated from a source code representation (10) into a target code representation (30). A basic idea of the invention is to associate references to target data value containers (40) in the target code with corresponding address information of original data value containers (20) of the source code during program code translation, and store information related to target code instructions together with associated address information of original data value containers at execution of target code to uphold a data value view (50) of the original source code representation. In this way, tracking of data values of original source code (10) at execution of translated target code (30) in a target system is supported in a highly efficient manner.

Abstract: The present invention relates to a processing unit for executing instructions in a computer system and to a method in such a processing unit. According to the present invention a decision is made whether or not to base execution on a value prediction (P), wherein the decision is based on information associated with the estimated time gain of execution based on a correct prediction. According to an embodiment of the present invention the decision regarding whether or not to execute speculatively is based on information regarding whether a cache hit or a cache miss is detected in connection with a load instruction. In an alternative embodiment of the present invention the decision is based on information regarding the dependency depth of the load instruction, i.e. the number of instructions that are dependent on the load.

Abstract: The general idea according to the invention is to introduce a special purpose register file (34) adapted for holding memory address calculation information received from memory (50, 70) and to provide one or more dedicated interfaces (73, 74) for allowing efficient transfer of memory address calculation information in relation to the special-purpose register file. The special-purpose register file (34) is preferably connected to at least one functional processor unit (42), which is operable for determining a memory address based on memory address calculation information received from the special-purpose register file (34). Once the memory address has been determined, the corresponding memory access can be effectuated.

Abstract: The read latency caused by job start preparation of a future job is at least partly hidden within the current job by reading information for job start preparation of the future job integrated with the execution of the current job. Instructions for job start preparation are preferably instrumented (701) into the current job and executed (702), whenever possible, in parallel with the instructions of the current job. The integrated job start preparation may include table look-ups, register file updating, instruction fetching and preparation. If the scheduled job order is allowed to change during execution, it is typically necessary to test (703) whether the next job is still valid before starting the execution, it is typically necessary to test (703) whether the next job is still valid before starting the execution of the next job and take appropriate actions (704; 705, 706) depending on the outcome of the test.

Abstract: The present invention relates to a processing unit for executing instructions in a computer system and to a method in such a processing unit. According to the present invention a decision is made whether or not to base execution on a value prediction (P), wherein the decision is based on information associated with the estimated time gain of execution based on a correct prediction. According to an embodiment of the present invention the decision regarding whether or not to execute speculatively is based on information regarding whether a cache hit or a cache miss is detected in connection with a load instruction. In an alternative embodiment of the present invention the decision is based on information regarding the dependency depth of the load instruction, i.e. the number of instructions that are dependent on the load.