Patents by Inventor Laura Matz

Laura Matz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240177093
    Abstract: A method for developing or improving a process for producing a product from a material comprising steps of acquiring process data from at least two different sources for the production process and its relevant parameters by using a Data Collecting computer; using the acquired process data related to the production process to perform a Process Mapping step by using a Process Mapping computer; assigning the acquired process data related to the relevant parameters of the production process to its corresponding process parts by performing a Data Mapping step by using a Data Mapping computer; analyzing the therefore mapped process data with a specific software performed on an Analyzing computer thereby identifying and validating one or more existing characteristics related to the quality or performance of the production process; and using the identified and validated characteristics to develop the production process or improve its performance.
    Type: Application
    Filed: March 17, 2022
    Publication date: May 30, 2024
    Inventors: Safa Kutup KURT, Rolf ROTH, Laura MATZ, Samuel WOOD
  • Patent number: 7745238
    Abstract: A method of measuring temperature across wafers during semiconductor processing includes the step of providing a correlation between a peak wafer temperature during a processing step and a change in wafer surface charge or surface potential following the processing step. A first wafer to be characterized for its peak temperature spatial distribution during the processing step is processed through the processing step. The wafer surface charge or surface potential at a plurality of locations on the first wafer are measured following the processing step. A peak temperature spatial distribution for the first wafer is then determined based on the correlation and the wafer surface charge or surface potential measured in the measuring step.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: June 29, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Deepak A. Ramappa, Rosa A. Orozco-Teran, Laura Matz
  • Publication number: 20090215203
    Abstract: A method of measuring temperature across wafers during semiconductor processing includes the step of providing a correlation between a peak wafer temperature during a processing step and a change in wafer surface charge or surface potential following the processing step. A first wafer to be characterized for its peak temperature spatial distribution during the processing step is processed through the processing step. The wafer surface charge or surface potential at a plurality of locations on the first wafer are measured following the processing step. A peak temperature spatial distribution for the first wafer is then determined based on the correlation and the wafer surface charge or surface potential measured in the measuring step.
    Type: Application
    Filed: February 26, 2008
    Publication date: August 27, 2009
    Inventors: Deepak A. Ramppa, Rosa A. Orozco-Teran, Laura Matz
  • Publication number: 20070184666
    Abstract: The present invention provides a method for removing residue from a cavity during the formation of an interconnect structure, a method for manufacturing an interconnect structure using the same, and a method for manufacturing an integrated circuit using the same. The method for removing residue from a cavity during the formation of an interconnect structure, among other steps, may include subjecting residue (410) having an embedded metal therein located within a cavity (310) in a dielectric layer (240) and over at least a portion of a conductive feature (220) to a short duration oxidation process so as to oxidize a substantial portion of the embedded metal, and removing the residue (410) containing the oxidized embedded metal using an etch process.
    Type: Application
    Filed: February 8, 2006
    Publication date: August 9, 2007
    Applicant: Texas Instruments Inc.
    Inventors: Patricia Smith, Heungsoo Park, Laura Matz, Vinay Shah, Phillip Matz
  • Publication number: 20060293181
    Abstract: Disclosed are thermal recording materials including different regions for recording latent and visible images. The thermal recording materials of the present teachings can include a substrate, a base coating containing an electron-accepting compound, and two or more top coatings each containing a different electron-donating compound. Latent images can be formed in exposed regions of the base coating, while visible images can be recorded in different colors in exposed regions of the top coatings. Methods of preparing and using the thermal recording materials also are disclosed.
    Type: Application
    Filed: June 16, 2006
    Publication date: December 28, 2006
    Inventors: Robert Menize, Eitan Zeira, Peter Morello, Richard Selah, Trevor Kelley, Laura Matz, David DeGulis
  • Publication number: 20060281312
    Abstract: The present invention provides a photoresist removal process and a method for manufacturing an interconnect using the same. One embodiment of the photoresist removal process includes, among other steps, providing a low dielectric constant (k) substrate having a photoresist layer located thereover, and removing the photoresist layer using a plasma which incorporates a gas which includes hydrogen or deuterium and a small amount of oxygen less than about 20 volume percent of the gas. Another embodiment of the photoresist removal process includes, among other steps, providing a low dielectric constant (k) substrate having a photoresist layer located thereover, removing a bulk portion of the photoresist layer using a plasma which incorporates a gas which includes hydrogen or deuterium, and removing a small portion of the photoresist layer using a plasma which incorporates a gas which includes oxygen, wherein the order of the two removing steps is interchangeable.
    Type: Application
    Filed: June 8, 2005
    Publication date: December 14, 2006
    Applicant: Texas Instruments, Incorporated
    Inventors: Patricia Smith, Laura Matz, Vinay Shah
  • Publication number: 20060264042
    Abstract: The present invention provides an interconnect structure, a method of manufacture therefore, and an integrated circuit including the same. In one embodiment of the present invention, the interconnect structure includes a conductive feature (150) located in or over a dielectric layer (140), and a silicon oxycarbonitride layer (160) located over the conductive feature (150).
    Type: Application
    Filed: May 20, 2005
    Publication date: November 23, 2006
    Applicant: Texas Instruments, Incorporated
    Inventors: Laura Matz, Ting Tsui, Robert Kraft
  • Publication number: 20060264028
    Abstract: The present invention provides a process for increasing the hermeticity of a hermetic layer, a method for manufacturing an interconnect structure, and a method for manufacturing an integrated circuit. The process for increasing the hermeticity of the hermetic layer, without limitation, includes providing a hermetic layer over a substrate (160), the hermetic layer having a initial hermeticity, and subjecting the hermetic layer to an energy beam, thereby causing the initial hermeticity to improve (170).
    Type: Application
    Filed: May 20, 2005
    Publication date: November 23, 2006
    Applicant: Texas Instruments, Incorporated
    Inventors: Laura Matz, Ting Tsui, Robert Kraft
  • Publication number: 20060243792
    Abstract: A stored-value card is provided which can be customized or imprinted with customer-friendly information at a point-of-sale. The stored-value card is made of a flexible material and includes a machine-readable data storage medium. The stored-value card also has at least one ink-receptive printable region which allows variable printing. One or more security features may be included on the stored-value card. Methods of using and making the stored-value card are provided.
    Type: Application
    Filed: April 4, 2006
    Publication date: November 2, 2006
    Inventors: Peter Morello, Eitan Zeira, Richard Selah, Laura Matz
  • Publication number: 20050241672
    Abstract: A method comprises extracting impurities from one or more materials in a semiconductor device via treatment with a supercritical fluid (SCF). The SCF may comprise a solvent and one or more co-solvents. Solvents may comprise 1-hexanol, 1-propanol, 2-propanol, acetone, ammonia, argon, carbon dioxide, chlorotrifluoromethane, cyclohexane, dichlorodifluoromethane, ethane, ethyl alcohol, ethylene, methane, methanol, n-butane, n-hexane, nitrous oxide, n-pentane, propane, propylene, toluene, trichlorofluoromethane, trichloromethane, water, or combinations thereof.
    Type: Application
    Filed: August 13, 2004
    Publication date: November 3, 2005
    Applicant: Texas Instruments Incorporated
    Inventors: Phillip Matz, Sameer Ajmera, Ju-Ai Ruan, Jinyoung Kim, Zhijian Lu, Laura Matz