Patents by Inventor Laura Nyns

Laura Nyns has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods of forming a semiconductor device by thermally treating a cleaned surface of a semiconductor substrate in a non-oxidizing ambient
    Patent number: 9799523
    Abstract: The present disclosure relates to methods for forming a high-k gate dielectric, the methods comprising the steps of providing a semiconductor substrate, cleaning the substrate, performing a thermal treatment, and performing a high-k dielectric material deposition, wherein said thermal treatment step is performed in a non-oxidizing ambient, leading to the formation of a thin interfacial layer between said semiconductor substrate and said high-k dielectric material and wherein the thickness of said thin interfacial layer is less than 10 ?.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: October 24, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hui OuYang, Jean-Luc Everaert, Laura Nyns, Rita Vos
  • III-V semiconductor device with interfacial layer
    Patent number: 9691872
    Abstract: A semiconductor structure comprises a substrate including a III-V material, and a high-k interfacial layer overlaying the substrate. The interfacial layer includes a rare earth aluminate. The present disclosure also relates to an n-type FET device comprising the same, and a method for manufacturing the same.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: June 27, 2017
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU Leuven R&D
    Inventors: Han Chung Lin, Laura Nyns, Tsvetan Ivanov, Dennis Van Dorp
  • Methods of Forming A Semiconductor Device
    Publication number: 20160035575
    Abstract: The present disclosure relates to methods for forming a high-k gate dielectric, the methods comprising the steps of providing a semiconductor substrate, cleaning the substrate, performing a thermal treatment, and performing a high-k dielectric material deposition, wherein said thermal treatment step is performed in a non-oxidizing ambient, leading to the formation of a thin interfacial layer between said semiconductor substrate and said high-k dielectric material and wherein the thickness of said thin interfacial layer is less than 10 ?.
    Type: Application
    Filed: October 12, 2015
    Publication date: February 4, 2016
    Inventors: Hui OuYang, Jean-Luc Everaert, Laura Nyns, Rita Vos
  • Methods of forming a semiconductor device
    Patent number: 9159582
    Abstract: The present disclosure relates to methods for forming a high-k gate dielectric, the methods comprising the steps of providing a semiconductor substrate, cleaning the substrate, performing a thermal treatment, and performing a high-k dielectric material deposition, wherein said thermal treatment step is performed in a non-oxidizing ambient, leading to the formation of a thin interfacial layer between said semiconductor substrate and said high-k dielectric material and wherein the thickness of said thin interfacial layer is less than 10 ?.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: October 13, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hui OuYang, Jean-Luc Everaert, Laura Nyns, Rita Vos
  • III-V Semiconductor Device with Interfacial Layer
    Publication number: 20150028428
    Abstract: A semiconductor structure comprises a substrate including a III-V material, and a high-k interfacial layer overlaying the substrate. The interfacial layer includes a rare earth aluminate. The present disclosure also relates to an n-type FET device comprising the same, and a method for manufacturing the same.
    Type: Application
    Filed: July 25, 2014
    Publication date: January 29, 2015
    Applicants: KATHOLIEKE UNIVERSITEIT LEUVEN, KU LEUVEN R&D, IMEC VZW
    Inventors: Han Chung Lin, Laura Nyns, Tsvetan Ivanov, Dennis Van Dorp
  • Methods of Forming a Semiconductor Device
    Publication number: 20090117750
    Abstract: The present disclosure relates to methods for forming a high-k gate dielectric, the methods comprising the steps of providing a semiconductor substrate, cleaning the substrate, performing a thermal treatment, and performing a high-k dielectric material deposition, wherein said thermal treatment step is performed in a non-oxidizing ambient, leading to the formation of a thin interfacial layer between said semiconductor substrate and said high-k dielectric material and wherein the thickness of said thin interfacial layer is less than 10 ?.
    Type: Application
    Filed: October 30, 2008
    Publication date: May 7, 2009
    Applicants: Interuniversitair Microelektronica Centrum (IMEC), Katholieke Universiteit Leuven, Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC)
    Inventors: Hui OuYang, Jean-Luc Everaert, Laura Nyns, Rita Vos