Abstract: Embodiments of the present disclosure relate to a spectrum control system. The system comprises one or more high frequency (HF) antennas, one or more multi-band (MB) antennas, and one or more datalinks. A spectrum management processor is configured to receive signals from the one or more HF and MB antennas and the one or more datalinks, and switch to one or more alternate radio-frequency (RF) channels for communications and/or position, navigation, and timing (PNT) information in response to a failure in a current communication channel and/or a global positioning system (GPS) signal.

Abstract: Embodiments of the present disclosure relate to a spectrum control system. The system comprises one or more high frequency (HF) antennas, one or more multi-band (MB) antennas, and one or more datalinks. A spectrum management processor is configured to receive signals from the one or more HF and MB antennas and the one or more datalinks, and switch to one or more alternate radio-frequency (RF) channels for communications and/or position, navigation, and timing (PNT) information in response to a failure in a current communication channel and/or a global positioning system (GPS) signal.

Abstract: In one aspect, an integrated circuit (IC) includes a secure router configured as a trust anchor, a non-volatile random access memory (RAM) direct memory access (DMA) channel coupled to the secure router, a first DMA coupled to the secure router and configured to receive data with a first classification and a second DMA coupled to the secure router and configured to receive data with a second classification. The IC also includes a secure boot/key controller coupled to the secure router and configured as a trust anchor to boot the IC securely and a processor coupled to the secure router and configured to encrypt data, to store protocols, to store instructions to detect malicious intrusions on the IC and to provide key management.

Abstract: In one aspect, an integrated circuit (IC) includes a secure router configured as a trust anchor, a non-volatile random access memory (RAM) direct memory access (DMA) channel coupled to the secure router, a first DMA coupled to the secure router and configured to receive data with a first classification and a second DMA coupled to the secure router and configured to receive data with a second classification. The IC also includes a secure boot/key controller coupled to the secure router and configured as a trust anchor to boot the IC securely and a processor coupled to the secure router and configured to encrypt data, to store protocols, to store instructions to detect malicious intrusions on the IC and to provide key management.