Abstract: Digital signal acquisition system is triggered when an input waveform matches a known reference waveform. This is achieved by calculating a stream of error metric values defined as a sum of absolute values of differences between incoming and reference samples. An error metric is calculated using only byte operations, which is advantageous for hardware implementation. A waveform trigger is determined by a sample index corresponding to a minimum value of the error metric and corresponds to a best match between input and reference waveforms. A waveform trigger is used for synchronous averaging and estimating time domain noise voltage. A reference waveform updates in poor SNR conditions to provide robust estimates of time domain noise by reducing reference waveform jitter.

Abstract: A two-stage digital down-conversion device for optimal detection of varying RF pulses incorporates a front end analog to digital converter (ADC), which samples an input RF signal and performs a first stage digital down conversion in wide bandwidth by means of two digital local oscillator multipliers, low pass filters and decimators. A stream of first stage quadrature I and Q samples is analyzed by a first stage I/Q processor. The I/Q processor generates an RF pulse trigger based on a first-stage envelope signal, center frequency and frequency span data which are used for a second stage narrow band digital down-conversion. The second stage digital down-conversion is based on mixing the first stage I and Q data samples with a second stage local oscillator, further low pass filtering and decimation using a second bandwidth.

Abstract: A two-stage digital down-conversion device for optimal detection of varying RF pulses incorporates a front end analog to digital converter (ADC), which samples an input RF signal and performs a first stage digital down conversion in wide bandwidth by means of two digital local oscillator multipliers, low pass filters and decimators. A stream of first stage quadrature I and Q samples is analyzed by a first stage I/Q processor. The I/Q processor generates an RF pulse trigger based on a first-stage envelope signal, center frequency and frequency span data which are used for a second stage narrow band digital down-conversion. The second stage digital down-conversion is based on mixing the first stage I and Q data samples with a second stage local oscillator, further low pass filtering and decimation using a second bandwidth.

Abstract: Digital signal acquisition system is triggered when an input waveform matches a known reference waveform. This is achieved by calculating a stream of error metric values defined as a sum of absolute values of differences between incoming and reference samples. An error metric is calculated using only byte operations, which is advantageous for hardware implementation. A waveform trigger is determined by a sample index corresponding to a minimum value of the error metric and corresponds to a best match between input and reference waveforms. A waveform trigger is used for synchronous averaging and estimating time domain noise voltage. A reference waveform updates in poor SNR conditions to provide robust estimates of time domain noise by reducing reference waveform jitter.