Abstract: Provided herein are low resistance metallization stack structures for 3D-NAND applications and related methods of fabrication. In some embodiments, thin metal oxynitride nucleation layers are deposited on dielectric material followed by deposition of a pure metal conductor using process conditions that increase non-molybdenum component element content at the oxynitride-dielectric interface. Certain embodiments of the methods described below convert less than all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.

Abstract: Methods and apparatuses for forming low resistivity tungsten using tungsten nitride barrier layers are provided herein. Methods involve depositing extremely thin tungsten nitride barrier layers prior to depositing tungsten nucleation and bulk tungsten layers. Methods are applicable for fabricating tungsten word lines in 3D NAND fabrication as well as for fabricating tungsten-containing components of DRAM and logic fabrication. Apparatus included processing stations with multiple charge volumes to pressurize gases in close vicinity to a showerhead of a processing chamber for processing semiconductor substrates.

Abstract: A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric filed to cause oxygen ionic motion.

Abstract: Embodiments of methods of filling features with molybdenum (Mo) include depositing a first layer of Mo in a feature including an opening and an interior and non-conformally treating the first layer such that regions near the opening preferentially treated over regions in the interior. In some embodiments, a second Mo layer is deposited on the treated first layer. Embodiments of methods of filling features with Mo include controlling Mo precursor flux to transition between conformal and non-conformal fill.

Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.

Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.

Abstract: Disclosed are methods of depositing a transition metal such as tungsten on a semiconductor substrate. The method includes providing a gas mixture of diborane with a balance of hydrogen, where the hydrogen serves to stabilize the diborane in the gas mixture. The method further includes delivering the gas mixture to the semiconductor substrate to form a boron layer, where the boron layer serves as a reducing agent layer to convert a metal-containing precursor to metal, such as a tungsten-containing precursor to tungsten. In some implementations, the semiconductor substrate includes a vertical structure, such as a three-dimensional vertical NAND structure, with horizontal features or wordlines having openings in sidewalls of the vertical structure, where the boron layer may be conformally deposited in the horizontal features of the vertical structure.

Abstract: Described herein are methods and apparatuses for filling semiconductor substrate structures with conductive material. The methods involve depositing multi-layer bulk metal films in structures with one or more deposition conditions changed when transitioning from layer-to-layer. The methods result in high fill quality, high throughput, low precursor consumption, and low roughness. Multi-station chambers to perform the methods are also provided.

Abstract: A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric filed to cause oxygen ionic motion.

Abstract: A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric filed to cause oxygen ionic motion.

Abstract: A memory cell including a memory element comprising an electrolytic insulator in contact with a conductive metal oxide (CMO) is disclosed. The CMO includes a crystalline structure and can comprise a pyrochlore oxide, a conductive binary oxide, a multiple B-site perovskite, and a Ruddlesden-Popper structure. The CMO includes mobile ions that can be transported to/from the electrolytic insulator in response to an electric field of appropriate magnitude and direction generated by a write voltage applied across the electrolytic insulator and CMO. The memory cell can include a non-ohmic device (NOD) that is electrically in series with the memory element. The memory cell can be positioned between a cross-point of conductive array lines in a two-terminal cross-point memory array in a single layer of memory or multiple vertically stacked layers of memory that are fabricated over a substrate that includes active circuitry for data operations on the array layer(s).

Abstract: A memory cell including a memory element comprising an electrolytic insulator in contact with a conductive metal oxide (CMO) is disclosed. The CMO includes a crystalline structure and can comprise a pyrochlore oxide, a conductive binary oxide, a multiple B-site perovskite, and a Ruddlesden-Popper structure. The CMO includes mobile ions that can be transported to/from the electrolytic insulator in response to an electric field of appropriate magnitude and direction generated by a write voltage applied across the electrolytic insulator and CMO. The memory cell can include a non-ohmic device (NOD) that is electrically in series with the memory element. The memory cell can be positioned between a cross-point of conductive array lines in a two-terminal cross-point memory array in a single layer of memory or multiple vertically stacked layers of memory that are fabricated over a substrate that includes active circuitry for data operations on the array layer(s).

Abstract: A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric filed to cause oxygen ionic motion.

Abstract: Disclosed are methods of depositing a transition metal such as tungsten on a semiconductor substrate. The method includes providing a gas mixture of diborane with a balance of hydrogen, where the hydrogen serves to stabilize the diborane in the gas mixture. The method further includes delivering the gas mixture to the semiconductor substrate to form a boron layer, where the boron layer serves as a reducing agent layer to convert a metal-containing precursor to metal, such as a tungsten-containing precursor to tungsten. In some implementations, the semiconductor substrate includes a vertical structure, such as a three-dimensional vertical NAND structure, with horizontal features or wordlines having openings in sidewalls of the vertical structure, where the boron layer may be conformally deposited in the horizontal features of the vertical structure.

Abstract: A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric filed to cause oxygen ionic motion.

Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.

Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.

Abstract: Methods of depositing fluorine-free tungsten by sequential CVD pulses, such as by alternately pulsing a fluorine-free tungsten precursor and hydrogen in cycles of temporally separated pulses, are provided. Some methods involve depositing fluorine-free tungsten by sequential CVD without depositing a tungsten nucleation layer. Methods also include depositing tungsten directly on a substrate surface using alternating pulses of a chlorine-containing tungsten precursor and hydrogen without treating the substrate surface. Methods also include depositing a tungsten layer using a reducing agent and fluorine-free tungsten-containing precursor and depositing bulk tungsten in sequential CVD cycles of alternating pulses of hydrogen and a tungsten-containing precursor.

Abstract: A memory cell including a memory element comprising an electrolytic insulator in contact with a conductive metal oxide (CMO) is disclosed. The CMO includes a crystalline structure and can comprise a pyrochlore oxide, a conductive binary oxide, a multiple B-site perovskite, and a Ruddlesden-Popper structure. The CMO includes mobile ions that can be transported to/from the electrolytic insulator in response to an electric field of appropriate magnitude and direction generated by a write voltage applied across the electrolytic insulator and CMO. The memory cell can include a non-ohmic device (NOD) that is electrically in series with the memory element. The memory cell can be positioned between a cross-point of conductive array lines in a two-terminal cross-point memory array in a single layer of memory or multiple vertically stacked layers of memory that are fabricated over a substrate that includes active circuitry for data operations on the array layer(s).

Abstract: A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric filed to cause oxygen ionic motion.