Patents by Inventor Lawrence Wong

Lawrence Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080180028
    Abstract: A method is provided for processing a workpiece in a plasma reactor chamber. The method includes coupling, to a plasma in the chamber, power of an RF frequency via a ceiling electrode and coupling, to the plasma, power of at least approximately the same RF frequency via a workpiece support electrode. The method also includes providing an edge ground return path. The method further includes adjusting the proportion between (a) current flow between said electrodes and (b) current flow to the edge ground return path from said electrodes, to control plasma ion density distribution uniformity over the workpiece.
    Type: Application
    Filed: April 11, 2007
    Publication date: July 31, 2008
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Douglas A. Buchberger, Shahid Rauf, Kallol Bera, Lawrence Wong, Walter R. Merry, Matthew L. Miller, Steven C. Shannon, Andrew Nguyen, James P. Cruse, James Carducci, Troy S. Detrick, Subhash Deshmukh, Jennifer Y. Sun
  • Publication number: 20080179181
    Abstract: A method for processing a workpiece in a plasma reactor chamber includes coupling RF power at a first VHF frequency f1 to a plasma via one of the electrodes of the chamber, and providing a center ground return path for RF current passing directly between the ceiling electrode and the workpiece support electrode for the frequency f1. The method further includes providing a variable height edge ground annular element and providing a ground return path through the edge ground annular element for the frequency f1. The method controls the uniformity of plasma ion density distribution by controlling the distance between the variable height edge ground annular element and one of: (a) height of ceiling electrode or (b) height of workpiece support electrode.
    Type: Application
    Filed: April 11, 2007
    Publication date: July 31, 2008
    Inventors: KENNETH S. COLLINS, Hiroji Hanawa, Kartik Ramaswamy, Douglas A. Buchberger, Shahid Rauf, Kallol Bera, Lawrence Wong, Walter R. Merry, Matthew L. Miller, Steven C. Shannon, Andrew Nguyen, James P. Cruse, James Carducci, Troy S. Detrick, Subhash Deshmukh, Jennifer Y. Sun
  • Publication number: 20080182418
    Abstract: A method of processing a workpiece in a plasma reactor chamber includes coupling RF power via an electrode to plasma in the chamber, the RF power being of a variable frequency in a frequency range that includes a fundamental frequency f. The method also includes coupling the electrode to a resonator having a resonant VHF frequency F which is a harmonic of the fundamental frequency f, so as to produce VHF power at the harmonic. The method controls the ratio of power near the fundamental f to power at harmonic F, by controlling the proportion of power from the generator that is up-converted from f to F, so as to control plasma ion density distribution.
    Type: Application
    Filed: April 11, 2007
    Publication date: July 31, 2008
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Douglas A. Buchberger, Shahid Rauf, Kallol Bera, Lawrence Wong, Walter R. Merry, Matthew L. Miller, Steven C. Shannon, Andrew Nguyen, James P. Cruse, James Carducci, Troy S. Detrick, Subhash Deshmukh, Jennifer Y. Sun
  • Publication number: 20080178803
    Abstract: A plasma reactor includes a ceiling electrode facing a workpiece support pedestal and a pedestal electrode in the pedestal and first and second VHF power sources of different frequencies coupled to the same or to different ones of the ceiling electrode and the pedestal electrode. The first and second VHF power sources are of sufficiently high and sufficiently low frequencies, respectively, to produce center-high and center-low plasma distribution non-uniformities, respectively, in the chamber. The reactor further includes a controller programmed to change the relative output power levels of the first and second VHF power sources to: (a) increase the relative output power level of the first VHF power source whenever plasma ion distribution has a predominantly edge-high non-uniformity, and (b) increase the relative output power level of the second VHF power source whenever plasma ion distribution has a predominantly center-high non-uniformity.
    Type: Application
    Filed: April 11, 2007
    Publication date: July 31, 2008
    Inventors: KENNETH S. COLLINS, Hiroji Hanawa, Kartik Ramaswamy, Douglas A. Buchberger, Shahid Rauf, Kallol Bera, Lawrence Wong, Walter R. Merry, Matthew L. Miller, Steven C. Shannon, Andrew Nguyen, James P. Cruse, James Carducci, Troy S. Detrick, Subhash Deshmukh, Jennifer Y. Sun
  • Publication number: 20080182417
    Abstract: In a plasma reactor chamber a ceiling electrode and a workpiece support electrode, respective RF power sources of respective VHF frequencies f1 and f2 are coupled to either respective ones of the electrodes or to a common one of the electrodes, where f1 is sufficiently high to produce a center-high non-uniform plasma ion distribution and f2 is sufficiently low to produce a center-low non-uniform plasma ion distribution. Respective center ground return paths are provided for RF current passing directly between the ceiling electrode and the workpiece support electrode for the frequencies f1 and f2, and an edge ground return path is provided for each of the frequencies f1 and f2. The impedance of at least one of the ground return paths is adjusted so as to control the uniformity of the plasma ion density distribution.
    Type: Application
    Filed: April 11, 2007
    Publication date: July 31, 2008
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Douglas A. Buchberger, Shahid Rauf, Kallol Bera, Lawrence Wong, Walter R. Merry, Matthew L. Miller, Steven C. Shannon, Andrew Nguyen, James P. Cruse, James Carducci, Troy S. Detrick, Subhash Deshmukh, Jennifer Y. Sun
  • Publication number: 20080179011
    Abstract: A plasma reactor includes an electrostatic chuck in the chamber for supporting the workpiece, a ceiling electrode facing the electrostatic chuck and an ESC electrode in the electrostatic chuck with an electrostatic clamping voltage supply coupled to the ESC electrode. The reactor further includes at least a first RF bias source of an LF or HF frequency coupled to the pedestal electrode, and first and second VHF power sources of different frequencies coupled to the same or to different ones of the electrodes. The first and second VHF power sources are of sufficiently high and sufficiently low frequencies, respectively, to produce center-high and center-low plasma distribution non-uniformities, respectively, in the chamber.
    Type: Application
    Filed: April 11, 2007
    Publication date: July 31, 2008
    Inventors: KENNETH S. COLLINS, Hiroji Hanawa, Kartik Ramaswamy, Douglas A. Buchberger, Shahid Rauf, Kallol Bera, Lawrence Wong, Walter R. Merry, Matthew L. Miller, Steven C. Shannon, Andrew Nguyen, James P. Cruse, James Carducci, Troy S. Detrick, Subhash Deshmukh, Jennifer Y. Sun
  • Publication number: 20080142991
    Abstract: Embodiments of the invention include a device with stacked substrates. Conducting interconnecting structures of one substrate are bonded to conducting interconnecting structures of another substrate. A passivating layer may be on the conducting interconnecting structures between the substrates and may be formed by an atomic layer deposition process or a with a Langmuir-Blodgett technique.
    Type: Application
    Filed: February 20, 2008
    Publication date: June 19, 2008
    Inventors: Lawrence Wong, Grant Kloster, Lawrence Foley
  • Patent number: 7354862
    Abstract: Embodiments of the invention include a device with stacked substrates. Conducting interconnecting structures of one substrate are bonded to conducting interconnecting structures of another substrate. A passivating layer may be on the conducting interconnecting structures between the substrates and may be formed by an atomic layer deposition process or a with a Langmuir-Blodgett technique.
    Type: Grant
    Filed: April 18, 2005
    Date of Patent: April 8, 2008
    Assignee: Intel Corporation
    Inventors: Lawrence Wong, Grant Kloster, Lawrence Foley
  • Patent number: 7215931
    Abstract: This patent describes a method and system which overcomes the LO-leakage problem during modulation and demodulation, common to direct conversion and similar RF transmitters and receivers. This problem is solved using a virtual local oscillator (VLO™) signal which emulates mixing with a local oscillators (LO) signal. The VLO signal is constructed using complementary mixing signals that suppress mixing power in the bandwidth of the input signal, and within the bandwidth of the output frequency. Specifically, mixing is done in two or more stages, using time-varying mixing signals ?1 and ?2 which satisfy the following criteria: ?1*?2 having significant power at the frequency of the LO being emulated, one of ?1 and ?2 having minimal power around the frequency of the output signal y(t), and the other of ?1 and ?2 having minimal power around the center frequency, fRF, of the input signal x(t).
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: May 8, 2007
    Assignee: Sirific Wireless Corporation
    Inventors: Chris Snyder, Tajinder Manku, Gareth Weale, Lawrence Wong
  • Patent number: 7164206
    Abstract: The invention relates to a microelectronic device and a structure therein that includes a diffusion barrier layer having a first thickness and a first dielectric constant. An etch stop layer is disposed above and on the diffusion barrier layer. The etch stop layer has a second thickness and a second dielectric constant.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: January 16, 2007
    Assignee: Intel Corporation
    Inventors: Grant Kloster, Jihperng Leu, Lawrence Wong, Andrew Ott, Patrick Marrow
  • Publication number: 20070007628
    Abstract: A method of forming an integrated circuit including forming a dielectric film is described. The forming of the dielectric film includes: providing a substrate, providing a carbon doped oxide film on the substrate, and treating the carbon doped oxide film with an electron beam. The carbon doped oxide film can be provided by chemical vapor deposition.
    Type: Application
    Filed: March 16, 2004
    Publication date: January 11, 2007
    Inventor: Lawrence Wong
  • Publication number: 20070009717
    Abstract: A method of forming an integrated circuit including forming a dielectric film is described. The forming of the dielectric film includes: providing a substrate, providing a carbon doped oxide film on the substrate, and treating the carbon doped oxide film with an electron beam. The carbon doped oxide film can be provided by chemical vapor deposition.
    Type: Application
    Filed: March 16, 2004
    Publication date: January 11, 2007
    Inventor: Lawrence Wong
  • Publication number: 20070005807
    Abstract: A method of communication of digital messages with improved efficiency through the use of the transfer of difference data between devices. In one aspect of the invention, the difference data communicated is between different generations of a derived message sequence such as an email thread. In another aspect of the invention, the messages are encoded by means of a codebook, and the difference data communicated is between different versions of the codebook. In this second aspect of the invention, the codebooks may automatically utilise the difference data to adapt their efficiency, and the codebooks may be automatically customised for specific individuals or groups.
    Type: Application
    Filed: November 30, 2005
    Publication date: January 4, 2007
    Applicant: Symbian Software Limited
    Inventor: Lawrence Wong
  • Publication number: 20060234473
    Abstract: Embodiments of the invention include a device with stacked substrates. Conducting interconnecting structures of one substrate are bonded to conducting interconnecting structures of another substrate. A passivating layer may be on the conducting interconnecting structures between the substrates and may be formed by an atomic layer deposition process or a with a Langmuir-Blodgett technique.
    Type: Application
    Filed: April 18, 2005
    Publication date: October 19, 2006
    Inventors: Lawrence Wong, Grant Kloster, Lawrence Foley
  • Publication number: 20060160342
    Abstract: Complementary metal oxide semiconductor metal gate transistors may be formed by depositing a metal layer in trenches formerly inhabited by patterned gate structures. The patterned gate structures may have been formed of polysilicon in one embodiment. The trenches may be filled with metal by surface activating using a catalytic metal, followed by electroless deposition of a seed layer followed by superconformal filling bottom up.
    Type: Application
    Filed: January 18, 2005
    Publication date: July 20, 2006
    Inventors: Mark Doczy, Lawrence Wong, Valery Dubin, Justin Brask, Jack Kavalieros, Suman Datta, Matthew Metz, Robert Chau
  • Patent number: 7046980
    Abstract: This patent describes a method and system which overcomes the LO-leakage problem of direct conversion and similar RF transmitters and receivers. To solve this problem a virtual LO™ signal is generated which emulates mixing with a local oscillator (LO) signal. However, the virtual local oscillator (VLO) signal is constructed using signals that do not contain a significant amount of power (or no power at all) at the wanted output RF frequency, so there is no LO component to leak to the output. The invention also does not require sophisticated filters or large capacitors as other designs in the art, so it is fully integratable.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: May 16, 2006
    Assignee: SiRiFIC Wireless Corporation
    Inventors: Tajinder Manku, Chris Snyder, Gareth Weale, Lawrence Wong
  • Patent number: 6992391
    Abstract: A dual-damascene process where first alternate ILDs are made of a first material and second alternate ILDs are made of a second material. Each material is etchable at a faster rate than the other in the presence of different etchant such as for an organic polymer and an inorganic low k material. This allows the ILDs to be deposited alternately on one another without an etchant stop layer thereby reducing capacitance.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: January 31, 2006
    Assignee: Intel Corporation
    Inventors: Andrew Ott, Lawrence Wong, Patrick Morrow, Jihperng Leu, Grant M. Kloster
  • Patent number: 6973297
    Abstract: This patent describes a method of removing the LO-leakage and 1/f noise problems associated with direct conversion RF receivers and other demodulators. In order to solve this problem a virtual LO™ signal is generated within the RF signal path which is tuned to the incoming RF signal. The virtual local oscillator (VLO) signal is constructed using signals that do not contain a significant amount of power (or no power at all) at the LO frequency. Any errors in generating the virtual LO signal are minimized using a closed loop correction scheme.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: December 6, 2005
    Assignee: Sirific Wireless Corporation
    Inventors: Tajinder Manku, Lawrence Wong, Yang Ling
  • Publication number: 20050208753
    Abstract: A dual-damascene process where first alternate ILDs are made of a first material and second alternate ILDs are made of a second material. Each material is etchable at a faster rate than the other in the presence of different etchant such as for an organic polymer and an inorganic low k material. This allows the ILDs to be deposited alternately on one another without an etchant stop layer thereby reducing capacitance.
    Type: Application
    Filed: May 17, 2005
    Publication date: September 22, 2005
    Inventors: Andrew Ott, Lawrence Wong, Patrick Morrow, Jihperng Leu, Grant Kloster
  • Publication number: 20040119163
    Abstract: A method for making a semiconductor device using carbon nitride as an etch stop diffusion barrier and/or a hard mask is described. An interconnect structure is made by at least: forming an etch stop diffusion layer, depositing an interlayer dielectric, etching necessary vias and trenches, forming a barrier layer, forming copper alloy, and planarizing. The use of a hard mask in the method is optional. The etch stop diffusion layer, the optional hard mask, or both comprised by carbon nitride.
    Type: Application
    Filed: December 23, 2002
    Publication date: June 24, 2004
    Inventors: Lawrence Wong, Jihperng Leu, Grant Kloster, Andrew W. Ott, Patrick Morrow