Abstract: The present invention provides an output buffer that converts a standard CMOS signal from the (0, +5) volt domain into a standard ECL signal in the (-0.8, -1.6) volt domain. This buffer circuit may be included as a part of a CMOS integrated circuit. The overall CMOS chip operates in the standard CMOS voltage range, but the ECL output buffer produces output levels in the standard ECL range. The buffer uses a pair of CMOS transistors (e.g., p-channel devices formed in N-wells) with the wells in which they are formed grounded and an input transistor with the well in which it is formed set at V.sub.DD (+5V). The first "grounded-well" transistor responds to the state of the input transistor to switch the second grounded-well (output) transistor on or off. Depending on its state, the output transistor contributes current or not to a voltage divider to set the appropriate ECL voltage level at the output of the buffer.