Patents by Inventor Leo J. Slechta, Jr.
Leo J. Slechta, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9590924Abstract: Methods and systems for a network device are provided. The network device includes a stage one arbiter for a base-port having a plurality of sub-ports for determining if there are any pending requests; blocking any other requests from a same receive queue destined for a same sub-port, same transmit queue when there are any pending requests; selecting a group of requests with a highest priority and available resources; selecting highest priority requests; selecting an oldest one of the highest priority requests; sending the selected requests to a stage two arbiter for selecting a request with a highest priority and when there are requests that have a same priority, selecting an oldest request for processing.Type: GrantFiled: March 16, 2015Date of Patent: March 7, 2017Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Gary M. Papenfuss, Leo J. Slechta, Jr.
-
Patent number: 9282000Abstract: Method and system for configuring a port of a network device are provided. One method for a port of a network device communicating with another network device port includes reading manufacturing, license and user provided port configuration data by a processor of the network device; obtaining capabilities information for the port by the processor of the network device from an external pluggable media device; setting port configuration data based on the capabilities information obtained from the external pluggable media; executing auto-negotiation on the port, when enabled and obtaining configuration data from the other port; determining that enough data is available to set port configuration; attempting to configure the port by using a highest permissible bandwidth configuration when enough data is available to set the port configuration; and setting port configuration based on the attempt to configure the port to operate when a link connected to the port is operational.Type: GrantFiled: June 25, 2015Date of Patent: March 8, 2016Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Craig M. Verba, Leo J. Slechta, Jr.
-
Patent number: 9172661Abstract: Method, system and network device for programming lane alignment markers are provided. The method includes configuring the first port having a plurality of sub-ports, as at least a dual lane port where each lane of the dual lane port is configured to receive and transmit frames; negotiating with the first network device to determine a lane alignment marker that is acceptable by the first network device; and programming the first port to identify the lane alignment marker associated with the vendor of the first network device for processing frames received from the first network device and transmitted to the first network device.Type: GrantFiled: November 15, 2012Date of Patent: October 27, 2015Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Ernest G. Kohlwey, Leo J. Slechta, Jr.
-
Patent number: 9094294Abstract: Method and system for reporting out-of-credit condition for a network device connected to a network. An indication to an out-of credit logic is provided that a first sub-port operating using a first protocol is out of credit to transmit information from a transmit segment. The first sub-port is a part of a base-port that includes a plurality of sub-ports that can be configured to operate at more than one operating speed to process packets complying with different protocols. The out-of-credit logic determines when the first sub-port is out-of-credit for a threshold period of time, and reports that the sub-port is out-of-credit to a processor of the network device.Type: GrantFiled: November 15, 2012Date of Patent: July 28, 2015Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Bret E. Indrelee, Leo J. Slechta, Jr., Gary M. Papenfuss, Edward C. Ross
-
Patent number: 9071559Abstract: Method and system for configuring a receive packet queue in a network device are provided. The method includes determining how many sub-ports of a port of the network device are configured; assigning memory to each of the configured sub-ports based on the determination of how many sub-ports are configured; determining a flow control scheme to be used for packet transmission; and dividing the receive packet queue based on the determination of the flow control scheme to be used.Type: GrantFiled: November 15, 2012Date of Patent: June 30, 2015Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Craig M. Verba, Leo J. Slechta, Jr.
-
Patent number: 8996798Abstract: Methods and systems for a network device having a plurality of base-ports, each base-port having a plurality of sub-ports configured to operate independently as a port for sending and receiving information using one of a plurality of network links at a plurality of rates complying with a plurality of protocols. The network device includes a ternary content addressable memory (TCAM) module for storing a plurality of entries for routing frames that are received for the plurality of sub-ports complying with the plurality of protocols. Each TCAM entry has an associated history value that is used by a processor for the network device to purge TCAM entries based on an age of the TCAM entries.Type: GrantFiled: November 15, 2012Date of Patent: March 31, 2015Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, William J. Andersen, Leo J. Slechta, Jr., Craig M. Verba
-
Patent number: 8995425Abstract: Methods and systems for a network device are provided. The network device includes a stage one arbiter for a base-port for determining if there are any pending requests; blocking any other requests from a same receive queue destined for a same sub-port, same physical transmit queue, and same virtual transmit queue when there are any pending requests; selecting a group of requests with a highest priority and available resources; selecting at least two of the highest priority requests; selecting an oldest one of the requests having the same priority when there are requests with a same priority; sending the selected requests to a stage two arbiter for the base-port; and determining if any new requests have been made or if any previously pending requests have been removed.Type: GrantFiled: November 15, 2012Date of Patent: March 31, 2015Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Gary M. Papenfuss, Leo J. Slechta, Jr.
-
Patent number: 4504907Abstract: A high speed data base search system which contains a general purpose computer coupled to a special purpose processor called the High Speed Search Function or HSSF. The HSSF may be external to the computer having a standard Input/Output communication path. An alternative approach places the HSSF internal to the computer providing communication via an internal bus. The HSSF is identical in either configuration except for the interface logic. The HSSF is programmable by the computer to perform complex searches on variable size data bases. The internal memory of the HSSF is loaded with the data base to be searched. Registers within the HSSF are loaded with reference words which define the search bounds. The field format register of the HSSF is loaded with a definition of the data base. The field comparison register is loaded to define the field-by-field search criteria. The Boolean Expression loaded into the HSSF defines which compare results are to be considered a hit.Type: GrantFiled: February 24, 1983Date of Patent: March 12, 1985Assignee: Sperry CorporationInventors: Bennett W. Manning, Leo J. Slechta, Jr., Kuo Y. Wen
-
Patent number: 4482983Abstract: Apparatus for and method of providing a variable speed cycle time for synchronous machines. The synchronous machine performs a number of functions, wherein the execution time for a given function is dependent upon the input quantities. Timing for the input dependent function is divided into fixed and variable sequences. A synchronous counter is loaded with a quantity representative of the input quantities. The synchronous counter then controls the duration of the variable sequences based upon the representative quantity. Since it is clocked by the system clock, the synchronous counter controls the variable sequences synchronously with the controlling of the fixed sequences.Type: GrantFiled: October 13, 1983Date of Patent: November 13, 1984Assignee: Sperry CorporationInventor: Leo J. Slechta, Jr.
-
Patent number: 4384325Abstract: Apparatus for and method of searching a data base using variable search criteria. The data base consists of a set of files or portions thereof. Each file is divided into a number of records whereby all records of a given file have the same format but the records of different files may have different formats. A field format register is used to define the format of the records within a given file. The field format register specifies the location and width of each field within a record. To perform a search, a field-by-field comparison of each record is made to a reference word. The comparison yields a less than, equal to or greater than result for each field of each record. A field comparison register describes the expected result of the field-by-field comparison. A given field is designated true if the comparison yields the expected result specified for that field in the field comparison register.Type: GrantFiled: June 23, 1980Date of Patent: May 17, 1983Assignee: Sperry CorporationInventors: Leo J. Slechta, Jr., Bennett W. Manning, Nancy E. Preckshot, Howard M. Wagner