Abstract: An apparatus and method is described for linearizing a non-linear device. This circuit consists of a detecting device for detecting a signal when received. A feedback device for providing a feedback signal. An operational amplifier and a bias means. These devices are coupled to provide an output that is linearly dependent upon the input to the circuit and not upon the amplitude of the signal received.

Abstract: A logic circuit uses an input Schottky diode of a first threshold and a clamp Schottky diode of a second threshold in combination with a high speed NPN switching transistor to form a simple high speed logic element. The novel use of two Schottky diodes of different threshold voltages provides a logic gate with a lower logic swing amenable with higher speed operation. Further, the operation of the logic gate is independent of the temperature characteristics of the NPN switching transistor. A PNP current source provides the drive current and load current for the logic gate in a simple manner which uses minimum chip area.

Abstract: An array of integrated circuits for selectively connecting a first communication line to a second communication line which employs a latching type semiconductor memory element for selectively energizing and deenergizing the semiconductor connect or disconnect switches located in the communication path. Addressing means are selectively responsive to addressing and reset signals for activating or deactivating the semiconductor latching circuit for either opening or closing the semiconductor switch. The semiconductor latching circuit is external to the communication lines and is capable of being set by the addressing signals and deactivated by a common line in conjunction with the set signals.