Abstract: The present invention provides a high impedance optical receiver circuit for use in integrated circuits. The receiver circuit consists of an optical detecting device connected to the gate of an FET device and further connected to a diode providing a load impedance. The FET device is connected to a biasing voltage through a biasing resistive element and to a conditioning stage output. The use of a diode to provide a load impedance allows for a smaller and easier to manufacture receiver circuit than would be possible using either a load resistor or a load FET. According to one aspect of the present invention, a digital integrated circuit employing SEED technology incorporates a plurality of diode-loaded receiver in an array of optical receiver circuits to reduce the footprint of the overall SEED circuit array.