Patents by Inventor Leonard Perham

Leonard Perham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6222212
    Abstract: An integrated circuit structure is described which includes a base semiconductor structure and a programmable semiconductor structure which are fabricated separately and later joined to form the integrated circuit structure. The base semiconductor structure includes conventional semiconductor devices fabricated in accordance with a first set of design rules. The programmable semiconductor structure includes programmable elements fabricated in accordance with a second set of design rules which may be different than the first set of design rules. The programmable elements are used to control the configuration of the integrated circuit structure or to provide field programmable devices for use in the integrated circuit structure.
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: April 24, 2001
    Assignee: Integrated Device Technology, Inc.
    Inventors: Ji-Min Lee, Joseph F. Santandrea, Chuen-Der Lien, Anita Hansen, Leonard Perham
  • Patent number: 6204557
    Abstract: An integrated circuit structure that includes a patterned uppermost conductive layer having a current-carrying trace. The current-carrying trace is connected to an underlying substrate by a multi-layer interconnect structure. The current-carrying trace, which is located around the outer edges of the integrated circuit structure, has at least one edge exhibiting a serpentine pattern. A topside film is located over the patterned uppermost conductive layer, wherein the topside film exhibits an increased thickness adjacent to the serpentine pattern. The increased thickness of the serpentine pattern results in a relatively strong topside film structure near the edges of the substrate. As a result, the portions of the topside film located over inner traces of the uppermost conductive layer are protected from excessive forces during thermal cycling.
    Type: Grant
    Filed: September 13, 1999
    Date of Patent: March 20, 2001
    Assignee: Integrated Device Technology, Inc.
    Inventors: Chuen-Der Lien, Chun-Ya Chen, Pauli Hsueh, Ta-Ke Tien, Leonard Perham