Abstract: A metal oxide semiconductor (MOS) phase lock loop data synchronization circuit, for use in conjuction with an integrated circuit disk controller device, comprising a temperature, process, and voltage compensated MOS voltage controlled oscillator (VCO), a three-bit counter, and a phase detector circuit. The phase detector circuit compares a decoded clock signal output from the VCO with incoming data from a disk device to detect phase differences between the frequency of the VCO and the actual frequency of the incoming data. The phase detector produces voltage signals in response to any such phase differences, which are coupled to the VCO and alter the frequency output of the VCO to match the frequency of the incoming data. The counter provides a system read-clock, which is fully synchronized with the incoming data, to an integrated circuit disk controller device which further processes the data.