Abstract: A two-terminal electronic fuse device involves two switches, four diodes, switch control circuitry, and a storage capacitor, connected in a particular topology. When AC current flows through the fuse, a charging current charges the storage capacitor. Energy stored in the storage capacitor is then used to power the switch control circuitry. If the voltage on the storage capacitor drops, then the switches are opened briefly and at the correct time. Opening the switches allows the charging current to flow. By opening the switches and charging the storage capacitor only at times of low current flow through the fuse, the disturbance of load current flowing through the fuse is minimized. If an overload current condition is detected, then the fuse has tripped and first and second switches are opened. If the capacitor does not need charging and there is no overload condition, then the switches remain closed.

Abstract: A two-terminal electronic fuse device involves two switches, four diodes, switch control circuitry, and a storage capacitor, connected in a particular topology. When AC current flows through the fuse, a charging current charges the storage capacitor. Energy stored in the storage capacitor is then used to power the switch control circuitry. If the voltage on the storage capacitor drops, then the switches are opened briefly and at the correct time. Opening the switches allows the charging current to flow. By opening the switches and charging the storage capacitor only at times of low current flow through the fuse, the disturbance of load current flowing through the fuse is minimized. If an overload current condition is detected, then the fuse has tripped and first and second switches are opened. If the capacitor does not need charging and there is no overload condition, then the switches remain closed.

Abstract: A gate driver integrated circuit drives an output signal onto its output terminal and onto the gate of a power transistor. In a turn-on episode, a digital input signal transitions to a digital logic high level. In response, the gate driver integrated circuit couples the output terminal to a positive supply voltage terminal, thereby driving a positive voltage onto the gate of the power transistor. In response to a high-to-low transition of the digital input signal, the driver drives a negative voltage onto the output terminal and power transistor gate for a short self-timed period of time, and then couples the output terminal to a ground terminal, thereby driving the output terminal and power transistor gate up to ground potential. The output terminal and power transistor gate are then held at ground potential in anticipation of the next turn-on episode of the power transistor.

Abstract: In a switching converter having an inductive load, a current may flow through the body diode of a transistor even though the gate of the transistor is being controlled to keep the transistor off. Then when the other transistor of the switch leg is turned on, a reverse recovery current flows in the reverse direction through the body diode. To reduce switching losses associated with such current flows, a gate driver integrated circuit detects when current flow through the body diode rises above a threshold current. The gate driver integrated circuit then controls the transistor to turn on. Then when the other transistor of the switch leg is made to turn on, the gate driver first turns the transistor off. When the gate-to-source voltage of the turning off transistor drops below a threshold voltage, then the gate driver integrated circuit allows and controls the other transistor to turn on.

Abstract: In a switching converter having an inductive load, a current may flow through the body diode of a transistor even though the gate of the transistor is being controlled to keep the transistor off. Then when the other transistor of the switch leg is turned on, a reverse recovery current flows in the reverse direction through the body diode. To reduce switching losses associated with such current flows, a gate driver integrated circuit detects when current flow through the body diode rises above a threshold current. The gate driver integrated circuit then controls the transistor to turn on. Then when the other transistor of the switch leg is made to turn on, the gate driver first turns the transistor off. When the gate-to-source voltage of the turning off transistor drops below a threshold voltage, then the gate driver integrated circuit allows and controls the other transistor to turn on.

Abstract: A two-terminal electronic fuse device involves two switches, four diodes, switch control circuitry, and a storage capacitor, connected in a particular topology. When AC current flows through the fuse, a charging current charges the storage capacitor. Energy stored in the storage capacitor is then used to power the switch control circuitry. If the voltage on the storage capacitor drops, then the switches are opened briefly and at the correct time. Opening the switches allows the charging current to flow. By opening the switches and charging the storage capacitor only at times of low current flow through the fuse, the disturbance of load current flowing through the fuse is minimized. If an overload current condition is detected, then the fuse has tripped and first and second switches are opened. If the capacitor does not need charging and there is no overload condition, then the switches remain closed.

Abstract: A two-terminal electronic fuse device involves two switches, four diodes, switch control circuitry, and a storage capacitor, connected in a particular topology. When AC current flows through the fuse, a charging current charges the storage capacitor. Energy stored in the storage capacitor is then used to power the switch control circuitry. If the voltage on the storage capacitor drops, then the switches are opened briefly and at the correct time. Opening the switches allows the charging current to flow. By opening the switches and charging the storage capacitor only at times of low current flow through the fuse, the disturbance of load current flowing through the fuse is minimized. If an overload current condition is detected, then the fuse has tripped and first and second switches are opened. If the capacitor does not need charging and there is no overload condition, then the switches remain closed.

Abstract: A gate driver integrated circuit drives an output signal onto its output terminal and onto the gate of a power transistor. In a turn-on episode, a digital input signal transitions to a digital logic high level. In response, the gate driver integrated circuit couples the output terminal to a positive supply voltage terminal, thereby driving a positive voltage onto the gate of the power transistor. In response to a high-to-low transition of the digital input signal, the driver drives a negative voltage onto the output terminal and power transistor gate for a short self-timed period of time, and then couples the output terminal to a ground terminal, thereby driving the output terminal and power transistor gate up to ground potential. The output terminal and power transistor gate are then held at ground potential in anticipation of the next turn-on episode of the power transistor.

Abstract: In a switching converter having an inductive load, a current may flow through the body diode of a transistor even though the gate of the transistor is being controlled to keep the transistor off. Then when the other transistor of the switch leg is turned on, a reverse recovery current flows in the reverse direction through the body diode. To reduce switching losses associated with such current flows, a gate driver integrated circuit detects when current flow through the body diode rises above a threshold current. The gate driver integrated circuit then controls the transistor to turn on. Then when the other transistor of the switch leg is made to turn on, the gate driver first turns the transistor off. When the gate-to-source voltage of the turning off transistor drops below a threshold voltage, then the gate driver integrated circuit allows and controls the other transistor to turn on.

Abstract: A gate driver integrated circuit drives an output signal onto its output terminal and onto the gate of a power transistor. In a turn-on episode, a digital input signal transitions to a digital logic high level. In response, the gate driver integrated circuit couples the output terminal to a positive supply voltage terminal, thereby driving a positive voltage onto the gate of the power transistor. In response to a high-to-low transition of the digital input signal, the driver drives a negative voltage onto the output terminal and power transistor gate for a short self-timed period of time, and then couples the output terminal to a ground terminal, thereby driving the output terminal and power transistor gate up to ground potential. The output terminal and power transistor gate are then held at ground potential in anticipation of the next turn-on episode of the power transistor.

Abstract: A gate driver integrated circuit drives an output signal onto its output terminal and onto the gate of a power transistor. In a turn-on episode, a digital input signal transitions to a digital logic high level. In response, the gate driver integrated circuit couples the output terminal to a positive supply voltage terminal, thereby driving a positive voltage onto the gate of the power transistor. In response to a high-to-low transition of the digital input signal, the driver drives a negative voltage onto the output terminal and power transistor gate for a short self-timed period of time, and then couples the output terminal to a ground terminal, thereby driving the output terminal and power transistor gate up to ground potential. The output terminal and power transistor gate are then held at ground potential in anticipation of the next turn-on episode of the power transistor.

Abstract: A rectifier includes a larger Field Effect Transistor (FET1) and a smaller FET (FET2). A sense resistor is in series with FET2's body diode between a cathode terminal and an anode terminal. If the cathode terminal voltage is greater than the voltage on the anode terminal, then body diodes of FETs are reverse biased, the FETs are controlled to be off, and there is no current flow through the rectifier. If, however, the voltage on the anode terminal becomes positive with respect to the cathode terminal, then the body diode of FET2 starts to conduct and there is a voltage drop across the sense resistor. A comparator detects this condition and turns both FETs on. The rectifier is then conductive, so current can flow from the anode terminal, through the larger FET1, and to the cathode terminal, with a small forward voltage drop and without passing across the sense resistor.

Abstract: A rectifier includes a larger Field Effect Transistor (FET1) and a smaller FET (FET2). A sense resistor is in series with FET2's body diode between a cathode terminal and an anode terminal. If the cathode terminal voltage is greater than the voltage on the anode terminal, then body diodes of FETs are reverse biased, the FETs are controlled to be off, and there is no current flow through the rectifier. If, however, the voltage on the anode terminal becomes positive with respect to the cathode terminal, then the body diode of FET2 starts to conduct and there is a voltage drop across the sense resistor. A comparator detects this condition and turns both FETs on. The rectifier is then conductive, so current can flow from the anode terminal, through the larger FET1, and to the cathode terminal, with a small forward voltage drop and without passing across the sense resistor.

Abstract: Within a non-isolated and efficient AC-to-DC power supply circuit: 1) a dep-FET is turned off to decouple an output voltage VO node from a VR node when a rectifier output signal VR on the VR node is greater than a first predetermined voltage VP and, 2) the dep-FET is enabled to be turned on so that a constant charging current flows from the VR node and onto the VO node when VR is less than VP (provided that VO is less than a second predetermined voltage VO(MAX) and provided that VR is adequately greater than VO). To speed turn off and on of the dep-FET, gate charge of the dep-FET is removed and is stored in a second capacitor when the dep-FET is to be turned off, and charge from the second capacitor is moved back onto the gate of the dep-FET when the dep-FET is to be turned on.

Abstract: A power supply circuit includes a rectifier, a charging circuit, and a storage capacitor. An AC signal is rectified by the rectifier thereby generating a rectified signal VR between a VR node and a GND node. The capacitor is coupled between an output voltage VO node and the GND node. If VR is greater than a first predetermined voltage VP then the VO node is decoupled from the VR node. If VR is below VP then the charging circuit supplies a substantially constant charging current from the VR node, through the charging circuit, to the VO node, and to the capacitor, provided that VO on the capacitor is below a second predetermined voltage VO(MAX) and provided that VR is adequately high with respect to VO. Due to the charging current, the voltage VO on the storage capacitor is restored to the desired second predetermined voltage.

Abstract: Within a non-isolated and efficient AC-to-DC power supply circuit: 1) a dep-FET is turned off to decouple an output voltage VO node from a VR node when a rectifier output signal VR on the VR node is greater than a first predetermined voltage VP and, 2) the dep-FET is enabled to be turned on so that a constant charging current flows from the VR node and onto the VO node when VR is less than VP (provided that VO is less than a second predetermined voltage VO(MAX) and provided that VR is adequately greater than VO). To speed turn off and on of the dep-FET, gate charge of the dep-FET is removed and is stored in a second capacitor when the dep-FET is to be turned off, and charge from the second capacitor is moved back onto the gate of the dep-FET when the dep-FET is to be turned on.

Abstract: A system for communicating with a host using control signals over a 1-wire interface is disclosed. The system includes a driver coupled to the host by the 1-wire interface. Control signals are transmitted from the host to the driver for decoding by the driver controller. The control signals are pulse width modulation format signals which are interpreted by the driver as binary encoded command mode signals or analog encoded command mode signals, depending upon when the signals are received in relation to a preamble pulse and a post-amble pulse.

Abstract: In a steady state operation mode, a charging circuit of a non-isolated AC-to-DC converter decouples an output voltage VO node from a VR node when the rectifier output signal VR on the VR node is greater than a first predetermined voltage VP and, 2) supplies a charging current from the VR node and onto the VO node when VR is less than VP provided that an output voltage VO on the VO node is less than a second predetermined voltage VO(MAX) and provided that VR is greater than VO. In an initial power up operation mode, the maximum limit value of the charging current is smaller than it is during steady state operation. Due to the reduced charging currents employed during initial power up operation, less noise is injected back to the AC source and EMI filters are not required between the rectifier of the converter and the AC source.

Abstract: In a steady state operation mode, a charging circuit of a non-isolated AC-to-DC converter decouples an output voltage VO node from a VR node when the rectifier output signal VR on the VR node is greater than a first predetermined voltage VP and, 2) supplies a charging current from the VR node and onto the VO node when VR is less than VP provided that an output voltage VO on the VO node is less than a second predetermined voltage VO(MAX) and provided that VR is greater than VO. In an initial power up operation mode, the maximum limit value of the charging current is smaller than it is during steady state operation. Due to the reduced charging currents employed during initial power up operation, less noise is injected back to the AC source and EMI filters are not required between the rectifier of the converter and the AC source.

Abstract: A power supply circuit includes a rectifier, a charging circuit, and a storage capacitor. An AC signal is rectified by the rectifier thereby generating a rectified signal VR between a VR node and a GND node. The capacitor is coupled between an output voltage VO node and the GND node. If VR is greater than a first predetermined voltage VP then the VO node is decoupled from the VR node. If VR is below VP then the charging circuit supplies a substantially constant charging current from the VR node, through the charging circuit, to the VO node, and to the capacitor, provided that VO on the capacitor is below a second predetermined voltage VO(MAX) and provided that VR is adequately high with respect to VO. Due to the charging current, the voltage VO on the storage capacitor is restored to the desired second predetermined voltage.